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authorTsiChung Liew <Tsi-Chung.Liew@freescale.com>2008-10-21 10:03:07 +0000
committerJohn Rigby <jrigby@freescale.com>2008-11-03 09:45:58 -0700
commit012522fef3b382469125beb46a315ab4dee02fb0 (patch)
tree9bc6b0cc47ec08dd3efb07a75eaa50fd04ec5f32 /include/asm-m68k/immap_5275.h
parentac2331aee99ad36be0fcfed8c49922e3c61b576d (diff)
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ColdFire: Modules header files cleanup
Consolidate ATA, ePORT, QSPI, FlexCan, PWM, RNG, MDHA, SKHA, INTC, and FlexBus structures and definitions in immap_5xxx.h to more unify modules header files. Append DSPI support for m547x_8x. SSI cleanup. Remove USB Host structure from immap_539.h. Apply changes to use FlexBus structures in mcf52x2's cpu_init.c and platform configuration files. Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Diffstat (limited to 'include/asm-m68k/immap_5275.h')
-rw-r--r--include/asm-m68k/immap_5275.h120
1 files changed, 9 insertions, 111 deletions
diff --git a/include/asm-m68k/immap_5275.h b/include/asm-m68k/immap_5275.h
index 495010b..46426a3 100644
--- a/include/asm-m68k/immap_5275.h
+++ b/include/asm-m68k/immap_5275.h
@@ -66,6 +66,15 @@
#define MMAP_USB (CONFIG_SYS_MBAR + 0x001C0000)
#define MMAP_PWM0 (CONFIG_SYS_MBAR + 0x001D0000)
+#include <asm/coldfire/eport.h>
+#include <asm/coldfire/flexbus.h>
+#include <asm/coldfire/intctrl.h>
+#include <asm/coldfire/mdha.h>
+#include <asm/coldfire/pwm.h>
+#include <asm/coldfire/qspi.h>
+#include <asm/coldfire/rng.h>
+#include <asm/coldfire/skha.h>
+
/* System configuration registers
*/
typedef struct sys_ctrl {
@@ -109,51 +118,6 @@ typedef struct sdram_ctrl {
u32 sdbmr1;
} sdramctrl_t;
-/* Chip select module registers, offset: 0x080
-*/
-typedef struct cs_ctlr {
- u16 ar0;
- u16 res1;
- u32 mr0;
- u16 res2;
- u16 cr0;
- u16 ar1;
- u16 res3;
- u32 mr1;
- u16 res4;
- u16 cr1;
- u16 ar2;
- u16 res5;
- u32 mr2;
- u16 res6;
- u16 cr2;
- u16 ar3;
- u16 res7;
- u32 mr3;
- u16 res8;
- u16 cr3;
- u16 ar4;
- u16 res9;
- u32 mr4;
- u16 res10;
- u16 cr4;
- u16 ar5;
- u16 res11;
- u32 mr5;
- u16 res12;
- u16 cr5;
- u16 ar6;
- u16 res13;
- u32 mr6;
- u16 res14;
- u16 cr6;
- u16 ar7;
- u16 res15;
- u32 mr7;
- u16 res16;
- u16 cr7;
-} csctrl_t;
-
/* DMA module registers, offset 0x100
*/
typedef struct dma_ctrl {
@@ -163,55 +127,6 @@ typedef struct dma_ctrl {
u32 dcr;
} dma_t;
-/* QSPI module registers, offset 0x340
- */
-typedef struct qspi_ctrl {
- u16 qmr;
- u8 res1[2];
- u16 qdlyr;
- u8 res2[2];
- u16 qwr;
- u8 res3[2];
- u16 qir;
- u8 res4[2];
- u16 qar;
- u8 res5[2];
- u16 qdr;
- u8 res6[2];
-} qspi_t;
-
-/* Interrupt module registers, offset 0xc00
-*/
-typedef struct int_ctrl {
- u32 iprh0;
- u32 iprl0;
- u32 imrh0;
- u32 imrl0;
- u32 frch0;
- u32 frcl0;
- u8 irlr;
- u8 iacklpr;
- u8 res1[0x26];
- u8 icr0[64]; /* No ICR0, done this way for readability */
- u8 res2[0x60];
- u8 swiack0;
- u8 res3[3];
- u8 Lniack0_1;
- u8 res4[3];
- u8 Lniack0_2;
- u8 res5[3];
- u8 Lniack0_3;
- u8 res6[3];
- u8 Lniack0_4;
- u8 res7[3];
- u8 Lniack0_5;
- u8 res8[3];
- u8 Lniack0_6;
- u8 res9[3];
- u8 Lniack0_7;
- u8 res10[3];
-} int0_t;
-
/* GPIO port registers
*/
typedef struct gpio_ctrl {
@@ -325,23 +240,6 @@ typedef struct gpio_ctrl {
} gpio_t;
-/* PWM module registers
- */
-typedef struct pwm_ctrl {
- u8 pwcr0;
- u8 res1[3];
- u8 pwcr1;
- u8 res2[3];
- u8 pwcr2;
- u8 res3[7];
- u8 pwwd0;
- u8 res4[3];
- u8 pwwd1;
- u8 res5[3];
- u8 pwwd2;
- u8 res6[7];
-} pwm_t;
-
/* Watchdog registers
*/
typedef struct wdog_ctrl {