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author | Wolfgang Denk <wd@denx.de> | 2010-04-10 23:59:39 +0200 |
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committer | Wolfgang Denk <wd@denx.de> | 2010-04-10 23:59:39 +0200 |
commit | fd4e49c18901a50b1648235f26da1e8caa0f8764 (patch) | |
tree | bb0a131be7139806b90ea95ca918619765c674d6 /include/asm-blackfin | |
parent | 30dc165a76b5165af77219189bc05d0fa4229d8b (diff) | |
parent | 3f1a5c1655d32b7ab8ae74c79934ce100ebcd2bf (diff) | |
download | u-boot-imx-fd4e49c18901a50b1648235f26da1e8caa0f8764.zip u-boot-imx-fd4e49c18901a50b1648235f26da1e8caa0f8764.tar.gz u-boot-imx-fd4e49c18901a50b1648235f26da1e8caa0f8764.tar.bz2 |
Merge branch 'master' of git://git.denx.de/u-boot-blackfin
Diffstat (limited to 'include/asm-blackfin')
-rw-r--r-- | include/asm-blackfin/config-pre.h | 3 | ||||
-rw-r--r-- | include/asm-blackfin/ptrace.h | 297 | ||||
-rw-r--r-- | include/asm-blackfin/traps.h | 62 |
3 files changed, 129 insertions, 233 deletions
diff --git a/include/asm-blackfin/config-pre.h b/include/asm-blackfin/config-pre.h index 1170a2a..4531519 100644 --- a/include/asm-blackfin/config-pre.h +++ b/include/asm-blackfin/config-pre.h @@ -71,6 +71,9 @@ static inline const char *get_bfin_boot_mode(int bfin_boot) # define BFIN_BOOT_SPI_SSEL 1 #endif +/* There is no Blackfin/NetBSD port */ +#undef CONFIG_BOOTM_NETBSD + /* We rarely use interrupts, so favor throughput over latency */ #define CONFIG_BFIN_INS_LOWOVERHEAD diff --git a/include/asm-blackfin/ptrace.h b/include/asm-blackfin/ptrace.h index f1b7d00..251d5e6 100644 --- a/include/asm-blackfin/ptrace.h +++ b/include/asm-blackfin/ptrace.h @@ -1,31 +1,11 @@ /* - * U-boot - ptrace.h + * Copyright 2004-2008 Analog Devices Inc. * - * Copyright (c) 2005-2007 Analog Devices Inc. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA + * Licensed under the GPL-2 or later. */ -#ifndef _BLACKFIN_PTRACE_H -#define _BLACKFIN_PTRACE_H - -#define NEW_PT_REGS +#ifndef _BFIN_PTRACE_H +#define _BFIN_PTRACE_H /* * GCC defines register number like this: @@ -35,128 +15,30 @@ * 16 - 31 dsp registers I/B/L0 -- I/B/L3 & M0--M3 * 32 - 33 A registers A0 & A1 * 34 - status register + * ----------------------------- * * We follows above, except: * 32-33 --- Low 32-bit of A0&1 * 34-35 --- High 8-bit of A0&1 */ -#if defined(NEW_PT_REGS) - -#define PT_IPEND 0 -#define PT_SYSCFG (PT_IPEND+4) -#define PT_SEQSTAT (PT_SYSCFG+4) -#define PT_RETE (PT_SEQSTAT+4) -#define PT_RETN (PT_RETE+4) -#define PT_RETX (PT_RETN+4) -#define PT_RETI (PT_RETX+4) -#define PT_PC PT_RETI -#define PT_RETS (PT_RETI+4) -#define PT_RESERVED (PT_RETS+4) -#define PT_ASTAT (PT_RESERVED+4) -#define PT_LB1 (PT_ASTAT+4) -#define PT_LB0 (PT_LB1+4) -#define PT_LT1 (PT_LB0+4) -#define PT_LT0 (PT_LT1+4) -#define PT_LC1 (PT_LT0+4) -#define PT_LC0 (PT_LC1+4) -#define PT_A1W (PT_LC0+4) -#define PT_A1X (PT_A1W+4) -#define PT_A0W (PT_A1X+4) -#define PT_A0X (PT_A0W+4) -#define PT_B3 (PT_A0X+4) -#define PT_B2 (PT_B3+4) -#define PT_B1 (PT_B2+4) -#define PT_B0 (PT_B1+4) -#define PT_L3 (PT_B0+4) -#define PT_L2 (PT_L3+4) -#define PT_L1 (PT_L2+4) -#define PT_L0 (PT_L1+4) -#define PT_M3 (PT_L0+4) -#define PT_M2 (PT_M3+4) -#define PT_M1 (PT_M2+4) -#define PT_M0 (PT_M1+4) -#define PT_I3 (PT_M0+4) -#define PT_I2 (PT_I3+4) -#define PT_I1 (PT_I2+4) -#define PT_I0 (PT_I1+4) -#define PT_USP (PT_I0+4) -#define PT_FP (PT_USP+4) -#define PT_P5 (PT_FP+4) -#define PT_P4 (PT_P5+4) -#define PT_P3 (PT_P4+4) -#define PT_P2 (PT_P3+4) -#define PT_P1 (PT_P2+4) -#define PT_P0 (PT_P1+4) -#define PT_R7 (PT_P0+4) -#define PT_R6 (PT_R7+4) -#define PT_R5 (PT_R6+4) -#define PT_R4 (PT_R5+4) -#define PT_R3 (PT_R4+4) -#define PT_R2 (PT_R3+4) -#define PT_R1 (PT_R2+4) -#define PT_R0 (PT_R1+4) -#define PT_ORIG_R0 (PT_R0+4) -#define PT_SR PT_SEQSTAT - -#else -/* - * Here utilize blackfin : dpregs = [pregs + imm16s4] - * [pregs + imm16s4] = dpregs - * to access defferent saved reg in stack - */ -#define PT_R3 0 -#define PT_R4 4 -#define PT_R2 8 -#define PT_R1 12 -#define PT_P5 16 -#define PT_P4 20 -#define PT_P3 24 -#define PT_P2 28 -#define PT_P1 32 -#define PT_P0 36 -#define PT_R7 40 -#define PT_R6 44 -#define PT_R5 48 -#define PT_PC 52 -#define PT_SEQSTAT 56 /* so-called SR reg */ -#define PT_SR PT_SEQSTAT -#define PT_ASTAT 60 -#define PT_RETS 64 -#define PT_A1w 68 -#define PT_A0w 72 -#define PT_A1x 76 -#define PT_A0x 80 -#define PT_ORIG_R0 84 -#define PT_R0 88 -#define PT_USP 92 -#define PT_FP 96 -#define PT_SP 100 - -/* Added by HuTao, May26 2003 3:18PM */ -#define PT_IPEND 100 - -/* Add SYSCFG register for single stepping support */ -#define PT_SYSCFG 104 - -#endif - #ifndef __ASSEMBLY__ -#if defined(NEW_PT_REGS) +struct task_struct; + /* this struct defines the way the registers are stored on the - * stack during a system call. - */ + stack during a system call. */ + struct pt_regs { + long orig_pc; long ipend; - long syscfg; long seqstat; long rete; long retn; long retx; - long pc; + long pc; /* PC == RETI */ long rets; - long reserved; + long reserved; /* Used as scratch during system calls */ long astat; long lb1; long lb0; @@ -201,69 +83,116 @@ struct pt_regs { long r1; long r0; long orig_r0; -}; - -#else -/* now we don't know what regs the system call will use */ -struct pt_regs { - long r3; - long r4; - long r2; - long r1; - long p5; - long p4; - long p3; - long p2; - long p1; - long p0; - long r7; - long r6; - long r5; - unsigned long pc; - unsigned long seqstat; - unsigned long astat; - unsigned long rets; - long a1w; - long a0w; - long a1x; - long a0x; - long orig_r0; - long r0; - long usp; - long fp; -/* - * Added for supervisor/user mode switch. - * - * HuTao May26 03 3:23PM - */ - long ipend; + long orig_p0; long syscfg; }; -#endif - /* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */ -#define PTRACE_GETREGS 12 -#define PTRACE_SETREGS 13 /* ptrace signal */ +#define PTRACE_GETREGS 12 +#define PTRACE_SETREGS 13 /* ptrace signal */ + +#define PTRACE_GETFDPIC 31 /* get the ELF fdpic loadmap address */ +#define PTRACE_GETFDPIC_EXEC 0 /* [addr] request the executable loadmap */ +#define PTRACE_GETFDPIC_INTERP 1 /* [addr] request the interpreter loadmap */ + +#define PS_S (0x0002) #ifdef __KERNEL__ -#ifndef PS_S -#define PS_S (0x0c00) +/* user_mode returns true if only one bit is set in IPEND, other than the + master interrupt enable. */ +#define user_mode(regs) (!(((regs)->ipend & ~0x10) & (((regs)->ipend & ~0x10) - 1))) +#define instruction_pointer(regs) ((regs)->pc) +#define user_stack_pointer(regs) ((regs)->usp) +#define profile_pc(regs) instruction_pointer(regs) +extern void show_regs(struct pt_regs *); + +#define arch_has_single_step() (1) +extern void user_enable_single_step(struct task_struct *); +/* see arch/blackfin/kernel/ptrace.c about this redirect */ +#define user_disable_single_step(child) ptrace_disable(child) -/* Bit 11:10 of SEQSTAT defines user/supervisor/debug mode - * 00: user - * 01: supervisor - * 1x: debug +/* + * Get the address of the live pt_regs for the specified task. + * These are saved onto the top kernel stack when the process + * is not running. + * + * Note: if a user thread is execve'd from kernel space, the + * kernel stack will not be empty on entry to the kernel, so + * ptracing these tasks will fail. */ +#define task_pt_regs(task) \ + (struct pt_regs *) \ + ((unsigned long)task_stack_page(task) + \ + (THREAD_SIZE - sizeof(struct pt_regs))) -#define PS_M (0x1000) /* I am not sure why this is required here Akbar */ -#endif +#endif /* __KERNEL__ */ -#define user_mode(regs) (!((regs)->seqstat & PS_S)) -#define instruction_pointer(regs) ((regs)->pc) -extern void show_regs(struct pt_regs *); +#endif /* __ASSEMBLY__ */ + +/* + * Offsets used by 'ptrace' system call interface. + */ -#endif -#endif -#endif +#define PT_R0 204 +#define PT_R1 200 +#define PT_R2 196 +#define PT_R3 192 +#define PT_R4 188 +#define PT_R5 184 +#define PT_R6 180 +#define PT_R7 176 +#define PT_P0 172 +#define PT_P1 168 +#define PT_P2 164 +#define PT_P3 160 +#define PT_P4 156 +#define PT_P5 152 +#define PT_FP 148 +#define PT_USP 144 +#define PT_I0 140 +#define PT_I1 136 +#define PT_I2 132 +#define PT_I3 128 +#define PT_M0 124 +#define PT_M1 120 +#define PT_M2 116 +#define PT_M3 112 +#define PT_L0 108 +#define PT_L1 104 +#define PT_L2 100 +#define PT_L3 96 +#define PT_B0 92 +#define PT_B1 88 +#define PT_B2 84 +#define PT_B3 80 +#define PT_A0X 76 +#define PT_A0W 72 +#define PT_A1X 68 +#define PT_A1W 64 +#define PT_LC0 60 +#define PT_LC1 56 +#define PT_LT0 52 +#define PT_LT1 48 +#define PT_LB0 44 +#define PT_LB1 40 +#define PT_ASTAT 36 +#define PT_RESERVED 32 +#define PT_RETS 28 +#define PT_PC 24 +#define PT_RETX 20 +#define PT_RETN 16 +#define PT_RETE 12 +#define PT_SEQSTAT 8 +#define PT_IPEND 4 + +#define PT_ORIG_R0 208 +#define PT_ORIG_P0 212 +#define PT_SYSCFG 216 +#define PT_TEXT_ADDR 220 +#define PT_TEXT_END_ADDR 224 +#define PT_DATA_ADDR 228 +#define PT_FDPIC_EXEC 232 +#define PT_FDPIC_INTERP 236 + +#endif /* _BFIN_PTRACE_H */ diff --git a/include/asm-blackfin/traps.h b/include/asm-blackfin/traps.h index b90ceda..7422d3d 100644 --- a/include/asm-blackfin/traps.h +++ b/include/asm-blackfin/traps.h @@ -1,42 +1,14 @@ /* - * U-boot - traps.h + * Copyright 2004-2009 Analog Devices Inc. + * 2001 Lineo, Inc + * Tony Kou + * 1993 Hamish Macdonald * - * Copyright (c) 2005-2007 Analog Devices Inc. - * - * This file is based on - * linux/include/asm/traps.h - * Copyright (C) 1993 Hamish Macdonald - * Lineo, Inc Jul 2001 Tony Kou - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA + * Licensed under the GPL-2 */ -/* - */ - -#ifndef _BLACKFIN_TRAPS_H -#define _BLACKFIN_TRAPS_H - -#ifndef __ASSEMBLY__ -typedef void (*e_vector) (void); -extern e_vector vectors[]; -#endif +#ifndef _BFIN_TRAPS_H +#define _BFIN_TRAPS_H #define VEC_SYS (0) #define VEC_EXCPT01 (1) @@ -64,23 +36,15 @@ extern e_vector vectors[]; #define VEC_CPLB_M (38) #define VEC_CPLB_MHIT (39) #define VEC_WATCH (40) -#define VEC_ISTRU_VL (41) +#define VEC_ISTRU_VL (41) /*ADSP-BF535 only (MH) */ #define VEC_MISALI_I (42) #define VEC_CPLB_I_VL (43) #define VEC_CPLB_I_M (44) #define VEC_CPLB_I_MHIT (45) #define VEC_ILL_RES (46) /* including unvalid supervisor mode insn */ +/* The hardware reserves (63) for future use - we use it to tell our + * normal exception handling code we have a hardware error + */ +#define VEC_HWERR (63) -#define VECOFF(vec) ((vec)<<2) - -#ifndef __ASSEMBLY__ - -/* Status register bits */ -#define PS_T (0x8000) -#define PS_S (0x0c00) /* Supervisor mode = 0b01 */ -#define PS_D (0x0c00) /* Debug mode = 0b1x */ -#define PS_M (0x1000) -#define PS_C (0x0001) - -#endif -#endif +#endif /* _BFIN_TRAPS_H */ |