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author | Mike Frysinger <vapier@gentoo.org> | 2008-08-07 13:08:54 -0400 |
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committer | Mike Frysinger <vapier@gentoo.org> | 2008-10-23 05:03:49 -0400 |
commit | 50ca95402876cf7bac4e2d4f7855f616a038763f (patch) | |
tree | 3636f0b534d696675e1dc553471d9b87b909dc91 /include/asm-blackfin/mach-bf561 | |
parent | d9d8c7c696dec370ca714c03beb6e79d4c90bd5e (diff) | |
download | u-boot-imx-50ca95402876cf7bac4e2d4f7855f616a038763f.zip u-boot-imx-50ca95402876cf7bac4e2d4f7855f616a038763f.tar.gz u-boot-imx-50ca95402876cf7bac4e2d4f7855f616a038763f.tar.bz2 |
Blackfin: unify DSPID/DBGSTAT MMR definitions
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'include/asm-blackfin/mach-bf561')
-rw-r--r-- | include/asm-blackfin/mach-bf561/BF561_cdef.h | 6 | ||||
-rw-r--r-- | include/asm-blackfin/mach-bf561/BF561_def.h | 2 |
2 files changed, 0 insertions, 8 deletions
diff --git a/include/asm-blackfin/mach-bf561/BF561_cdef.h b/include/asm-blackfin/mach-bf561/BF561_cdef.h index 395cd28..23e64ca 100644 --- a/include/asm-blackfin/mach-bf561/BF561_cdef.h +++ b/include/asm-blackfin/mach-bf561/BF561_cdef.h @@ -400,12 +400,6 @@ #define pEVT_OVERRIDE ((uint32_t volatile *)EVT_OVERRIDE) #define bfin_read_EVT_OVERRIDE() bfin_read32(EVT_OVERRIDE) #define bfin_write_EVT_OVERRIDE(val) bfin_write32(EVT_OVERRIDE, val) -#define pDSPID ((uint32_t volatile *)DSPID) -#define bfin_read_DSPID() bfin_read32(DSPID) -#define bfin_write_DSPID(val) bfin_write32(DSPID, val) -#define pDBGSTAT ((uint32_t volatile *)DBGSTAT) -#define bfin_read_DBGSTAT() bfin_read32(DBGSTAT) -#define bfin_write_DBGSTAT(val) bfin_write32(DBGSTAT, val) #define pUART_THR ((uint16_t volatile *)UART_THR) #define bfin_read_UART_THR() bfin_read16(UART_THR) #define bfin_write_UART_THR(val) bfin_write16(UART_THR, val) diff --git a/include/asm-blackfin/mach-bf561/BF561_def.h b/include/asm-blackfin/mach-bf561/BF561_def.h index 22b5bac..8534962 100644 --- a/include/asm-blackfin/mach-bf561/BF561_def.h +++ b/include/asm-blackfin/mach-bf561/BF561_def.h @@ -140,8 +140,6 @@ #define SRAM_BASE_ADDR_CORE_A 0xFFE00000 #define SRAM_BASE_ADDR_CORE_B 0xFFE00000 #define EVT_OVERRIDE 0xFFE02100 -#define DSPID 0xFFE05000 -#define DBGSTAT 0xFFE05008 #define UART_THR 0xFFC00400 #define UART_RBR 0xFFC00400 #define UART_DLL 0xFFC00400 |