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author | Mike Frysinger <vapier@gentoo.org> | 2008-08-07 13:08:54 -0400 |
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committer | Mike Frysinger <vapier@gentoo.org> | 2008-10-23 05:03:49 -0400 |
commit | 50ca95402876cf7bac4e2d4f7855f616a038763f (patch) | |
tree | 3636f0b534d696675e1dc553471d9b87b909dc91 /include/asm-blackfin/mach-bf537 | |
parent | d9d8c7c696dec370ca714c03beb6e79d4c90bd5e (diff) | |
download | u-boot-imx-50ca95402876cf7bac4e2d4f7855f616a038763f.zip u-boot-imx-50ca95402876cf7bac4e2d4f7855f616a038763f.tar.gz u-boot-imx-50ca95402876cf7bac4e2d4f7855f616a038763f.tar.bz2 |
Blackfin: unify DSPID/DBGSTAT MMR definitions
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'include/asm-blackfin/mach-bf537')
-rw-r--r-- | include/asm-blackfin/mach-bf537/ADSP-EDN-BF534-extended_cdef.h | 3 | ||||
-rw-r--r-- | include/asm-blackfin/mach-bf537/ADSP-EDN-BF534-extended_def.h | 1 |
2 files changed, 0 insertions, 4 deletions
diff --git a/include/asm-blackfin/mach-bf537/ADSP-EDN-BF534-extended_cdef.h b/include/asm-blackfin/mach-bf537/ADSP-EDN-BF534-extended_cdef.h index b000ea2..b9e4d67 100644 --- a/include/asm-blackfin/mach-bf537/ADSP-EDN-BF534-extended_cdef.h +++ b/include/asm-blackfin/mach-bf537/ADSP-EDN-BF534-extended_cdef.h @@ -2721,9 +2721,6 @@ #define pTCOUNT ((uint32_t volatile *)TCOUNT) /* Core Timer Count Register */ #define bfin_read_TCOUNT() bfin_read32(TCOUNT) #define bfin_write_TCOUNT(val) bfin_write32(TCOUNT, val) -#define pDSPID ((uint32_t volatile *)DSPID) -#define bfin_read_DSPID() bfin_read32(DSPID) -#define bfin_write_DSPID(val) bfin_write32(DSPID, val) #define pCHIPID ((uint32_t volatile *)CHIPID) #define bfin_read_CHIPID() bfin_read32(CHIPID) #define bfin_write_CHIPID(val) bfin_write32(CHIPID, val) diff --git a/include/asm-blackfin/mach-bf537/ADSP-EDN-BF534-extended_def.h b/include/asm-blackfin/mach-bf537/ADSP-EDN-BF534-extended_def.h index 077412a..61ffa14 100644 --- a/include/asm-blackfin/mach-bf537/ADSP-EDN-BF534-extended_def.h +++ b/include/asm-blackfin/mach-bf537/ADSP-EDN-BF534-extended_def.h @@ -911,7 +911,6 @@ #define TPERIOD 0xFFE03004 /* Core Timer Period Register */ #define TSCALE 0xFFE03008 /* Core Timer Scale Register */ #define TCOUNT 0xFFE0300C /* Core Timer Count Register */ -#define DSPID 0xFFE05000 #define CHIPID 0xFFC00014 #define TBUFCTL 0xFFE06000 /* Trace Buffer Control Register */ #define TBUFSTAT 0xFFE06004 /* Trace Buffer Status Register */ |