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author | Marian Balakowicz <m8@semihalf.com> | 2008-02-21 17:18:01 +0100 |
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committer | Marian Balakowicz <m8@semihalf.com> | 2008-02-21 17:18:01 +0100 |
commit | 20c93959330aba8b5bbdbfde1ef319e99eba235d (patch) | |
tree | ef82297e3aeb904f94584e6d136fac55ec32c317 /include/asm-blackfin/mach-bf533/BF533_def.h | |
parent | 5cf746c303710329f8040d9c62ee354313e3e91f (diff) | |
parent | 928d1d77f8623c120d8763e20e1ca58df9c5c4c6 (diff) | |
download | u-boot-imx-20c93959330aba8b5bbdbfde1ef319e99eba235d.zip u-boot-imx-20c93959330aba8b5bbdbfde1ef319e99eba235d.tar.gz u-boot-imx-20c93959330aba8b5bbdbfde1ef319e99eba235d.tar.bz2 |
Merge branch 'master' of /home/git/u-boot
Diffstat (limited to 'include/asm-blackfin/mach-bf533/BF533_def.h')
-rw-r--r-- | include/asm-blackfin/mach-bf533/BF533_def.h | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/include/asm-blackfin/mach-bf533/BF533_def.h b/include/asm-blackfin/mach-bf533/BF533_def.h new file mode 100644 index 0000000..17b5d7f --- /dev/null +++ b/include/asm-blackfin/mach-bf533/BF533_def.h @@ -0,0 +1,29 @@ +/* DO NOT EDIT THIS FILE + * Automatically generated by generate-def-headers.xsl + * DO NOT EDIT THIS FILE + */ + +#ifndef __BFIN_DEF_ADSP_BF533_proc__ +#define __BFIN_DEF_ADSP_BF533_proc__ + +#include "../mach-common/ADSP-EDN-core_def.h" + +#include "../mach-common/ADSP-EDN-extended_def.h" + +#define L1_DATA_A_SRAM 0xFF800000 /* 0xFF800000 -> 0xFF803FFF Data Bank A SRAM */ +#define L1_DATA_A_SRAM_SIZE (0xFF803FFF - 0xFF800000 + 1) +#define L1_DATA_A_SRAM_END (L1_DATA_A_SRAM + L1_DATA_A_SRAM_SIZE) +#define L1_DATA_B_SRAM 0xFF900000 /* 0xFF900000 -> 0xFF903FFF Data Bank B SRAM */ +#define L1_DATA_B_SRAM_SIZE (0xFF903FFF - 0xFF900000 + 1) +#define L1_DATA_B_SRAM_END (L1_DATA_B_SRAM + L1_DATA_B_SRAM_SIZE) +#define L1_INST_SRAM 0xFFA00000 /* 0xFFA00000 -> 0xFFA07FFF Instruction Bank A SRAM */ +#define L1_INST_SRAM_SIZE (0xFFA07FFF - 0xFFA00000 + 1) +#define L1_INST_SRAM_END (L1_INST_SRAM + L1_INST_SRAM_SIZE) +#define L1_SRAM_SCRATCH 0xFFB00000 /* 0xFFB00000 -> 0xFFB00FFF Scratchpad SRAM */ +#define L1_SRAM_SCRATCH_SIZE (0xFFB00FFF - 0xFFB00000 + 1) +#define L1_SRAM_SCRATCH_END (L1_SRAM_SCRATCH + L1_SRAM_SCRATCH_SIZE) +#define SYSMMR_BASE 0xFFC00000 /* 0xFFC00000 -> 0xFFFFFFFF MMR registers */ +#define SYSMMR_BASE_SIZE (0xFFFFFFFF - 0xFFC00000 + 1) +#define SYSMMR_BASE_END (SYSMMR_BASE + SYSMMR_BASE_SIZE) + +#endif /* __BFIN_DEF_ADSP_BF533_proc__ */ |