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| author | Wolfgang Denk <wd@denx.de> | 2010-01-17 23:08:42 +0100 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2010-01-17 23:08:42 +0100 |
| commit | 3e3989619f5ed3ee28002d985f3da28540586ab9 (patch) | |
| tree | d4434455cafdc0c750aa26e642949232ffd0b2d3 /include/asm-blackfin/mach-bf527/BF524_def.h | |
| parent | 64917ca38933d10b3763f61df7a1e58e1e127b52 (diff) | |
| parent | 846a6391e4bc9fdd721753a1021953ff0ca17c27 (diff) | |
| download | u-boot-imx-3e3989619f5ed3ee28002d985f3da28540586ab9.zip u-boot-imx-3e3989619f5ed3ee28002d985f3da28540586ab9.tar.gz u-boot-imx-3e3989619f5ed3ee28002d985f3da28540586ab9.tar.bz2 | |
Merge branch 'master' of git://git.denx.de/u-boot-blackfin
Diffstat (limited to 'include/asm-blackfin/mach-bf527/BF524_def.h')
| -rw-r--r-- | include/asm-blackfin/mach-bf527/BF524_def.h | 15 |
1 files changed, 0 insertions, 15 deletions
diff --git a/include/asm-blackfin/mach-bf527/BF524_def.h b/include/asm-blackfin/mach-bf527/BF524_def.h index 10793e8..bd6aa8f 100644 --- a/include/asm-blackfin/mach-bf527/BF524_def.h +++ b/include/asm-blackfin/mach-bf527/BF524_def.h @@ -288,20 +288,5 @@ #define USB_DMA7_ADDRHIGH 0xFFC03CEC /* Upper 16-bits of memory source/destination address for DMA master channel 7 */ #define USB_DMA7_COUNTLOW 0xFFC03CF0 /* Lower 16-bits of byte count of DMA transfer for DMA master channel 7 */ #define USB_DMA7_COUNTHIGH 0xFFC03CF4 /* Upper 16-bits of byte count of DMA transfer for DMA master channel 7 */ -#define L1_DATA_A_SRAM 0xFF800000 /* 0xFF800000 -> 0xFF803FFF Data Bank A SRAM */ -#define L1_DATA_A_SRAM_SIZE (0xFF803FFF - 0xFF800000 + 1) -#define L1_DATA_A_SRAM_END (L1_DATA_A_SRAM + L1_DATA_A_SRAM_SIZE) -#define L1_DATA_B_SRAM 0xFF900000 /* 0xFF900000 -> 0xFF903FFF Data Bank B SRAM */ -#define L1_DATA_B_SRAM_SIZE (0xFF903FFF - 0xFF900000 + 1) -#define L1_DATA_B_SRAM_END (L1_DATA_B_SRAM + L1_DATA_B_SRAM_SIZE) -#define L1_INST_SRAM 0xFFA00000 /* 0xFFA00000 -> 0xFFA07FFF Instruction Bank A SRAM */ -#define L1_INST_SRAM_SIZE (0xFFA07FFF - 0xFFA00000 + 1) -#define L1_INST_SRAM_END (L1_INST_SRAM + L1_INST_SRAM_SIZE) -#define L1_SRAM_SCRATCH 0xFFB00000 /* 0xFFB00000 -> 0xFFB00FFF Scratchpad SRAM */ -#define L1_SRAM_SCRATCH_SIZE (0xFFB00FFF - 0xFFB00000 + 1) -#define L1_SRAM_SCRATCH_END (L1_SRAM_SCRATCH + L1_SRAM_SCRATCH_SIZE) -#define SYSMMR_BASE 0xFFC00000 /* 0xFFC00000 -> 0xFFFFFFFF MMR registers */ -#define SYSMMR_BASE_SIZE (0xFFFFFFFF - 0xFFC00000 + 1) -#define SYSMMR_BASE_END (SYSMMR_BASE + SYSMMR_BASE_SIZE) #endif /* __BFIN_DEF_ADSP_BF524_proc__ */ |