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| author | Fugang Duan <B38611@freescale.com> | 2012-03-13 19:40:17 +0800 |
|---|---|---|
| committer | Fugang Duan <B38611@freescale.com> | 2012-03-20 13:36:56 +0800 |
| commit | 34bd725fcc22e8e2435bbb7b3b51c05376ea9619 (patch) | |
| tree | b577aae1ff4433ab076673e4204dafe14835f2e4 /include/asm-blackfin/cplb.h | |
| parent | 5ec7e8338acc96768faa3e9b983e05989e4b99da (diff) | |
| download | u-boot-imx-34bd725fcc22e8e2435bbb7b3b51c05376ea9619.zip u-boot-imx-34bd725fcc22e8e2435bbb7b3b51c05376ea9619.tar.gz u-boot-imx-34bd725fcc22e8e2435bbb7b3b51c05376ea9619.tar.bz2 | |
ENGR00176834-3 - i.MX6DL sabresd : DDR init script update
Use the ddr init script “MX6DL_init_DDR3_400MHz_64bit_1.2.inc”
for SD revB with Rigel mounted, and update the calibration parameters
(write leveling, DQS gating, read delay, write delay),
which is located at:
http://compass.freescale.net/livelink/livelink?func=ll&
objid=225128962&objAction=browse&sort=name
Signed-off-by: Fugang Duan <B38611@freescale.com>
Diffstat (limited to 'include/asm-blackfin/cplb.h')
0 files changed, 0 insertions, 0 deletions