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author | Haavard Skinnemoen <haavard.skinnemoen@atmel.com> | 2009-02-23 10:34:46 +0100 |
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committer | Haavard Skinnemoen <haavard.skinnemoen@atmel.com> | 2009-02-23 10:34:46 +0100 |
commit | 7d3921bffb498d065785c17b4a42480db54a2676 (patch) | |
tree | 16409a328b62784d8427ca23f2812a620aad9991 /include/asm-avr32/arch-at32ap700x/gpio-impl.h | |
parent | 156feb90d200f186cdfd856d7f6f1878bb1bec1e (diff) | |
parent | b423f94063bf04e92047ff85c7e53441eb3b712b (diff) | |
download | u-boot-imx-7d3921bffb498d065785c17b4a42480db54a2676.zip u-boot-imx-7d3921bffb498d065785c17b4a42480db54a2676.tar.gz u-boot-imx-7d3921bffb498d065785c17b4a42480db54a2676.tar.bz2 |
Merge branch 'evk1100-prep' into next
Diffstat (limited to 'include/asm-avr32/arch-at32ap700x/gpio-impl.h')
-rw-r--r-- | include/asm-avr32/arch-at32ap700x/gpio-impl.h | 86 |
1 files changed, 86 insertions, 0 deletions
diff --git a/include/asm-avr32/arch-at32ap700x/gpio-impl.h b/include/asm-avr32/arch-at32ap700x/gpio-impl.h new file mode 100644 index 0000000..8801bd0 --- /dev/null +++ b/include/asm-avr32/arch-at32ap700x/gpio-impl.h @@ -0,0 +1,86 @@ +#ifndef __ASM_AVR32_ARCH_GPIO_IMPL_H__ +#define __ASM_AVR32_ARCH_GPIO_IMPL_H__ + +/* Register offsets */ +struct gpio_regs { + u32 GPER; + u32 GPERS; + u32 GPERC; + u32 GPERT; + u32 PMR0; + u32 PMR0S; + u32 PMR0C; + u32 PMR0T; + u32 PMR1; + u32 PMR1S; + u32 PMR1C; + u32 PMR1T; + u32 __reserved0[4]; + u32 ODER; + u32 ODERS; + u32 ODERC; + u32 ODERT; + u32 OVR; + u32 OVRS; + u32 OVRC; + u32 OVRT; + u32 PVR; + u32 __reserved_PVRS; + u32 __reserved_PVRC; + u32 __reserved_PVRT; + u32 PUER; + u32 PUERS; + u32 PUERC; + u32 PUERT; + u32 PDER; + u32 PDERS; + u32 PDERC; + u32 PDERT; + u32 IER; + u32 IERS; + u32 IERC; + u32 IERT; + u32 IMR0; + u32 IMR0S; + u32 IMR0C; + u32 IMR0T; + u32 IMR1; + u32 IMR1S; + u32 IMR1C; + u32 IMR1T; + u32 GFER; + u32 GFERS; + u32 GFERC; + u32 GFERT; + u32 IFR; + u32 __reserved_IFRS; + u32 IFRC; + u32 __reserved_IFRT; + u32 ODMER; + u32 ODMERS; + u32 ODMERC; + u32 ODMERT; + u32 __reserved1[4]; + u32 ODCR0; + u32 ODCR0S; + u32 ODCR0C; + u32 ODCR0T; + u32 ODCR1; + u32 ODCR1S; + u32 ODCR1C; + u32 ODCR1T; + u32 __reserved2[4]; + u32 OSRR0; + u32 OSRR0S; + u32 OSRR0C; + u32 OSRR0T; + u32 __reserved3[8]; + u32 STER; + u32 STERS; + u32 STERC; + u32 STERT; + u32 __reserved4[35]; + u32 VERSION; +}; + +#endif /* __ASM_AVR32_ARCH_GPIO_IMPL_H__ */ |