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authorNick Thompson <nick.thompson@gefanuc.com>2009-12-12 12:12:26 -0500
committerTom Rix <Tom.Rix@windriver.com>2010-01-04 08:48:17 -0600
commit97f4eb8cfb97c7c5b158e3c0df4611efbf50f403 (patch)
tree61fc8af5589184dd825d70659b7e5c8491e369d3 /include/asm-arm
parent90110e0eab5ac6ab714109ce1fd8873c858dd552 (diff)
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Davinci: Configurable NAND chip selects
Davinci: Configurable NAND chip selects Add a CONFIG_SYS_NAND_CS setting to all davinci configs and use it to setup the NAND controller in the davinci_nand mtd driver. Signed-off-by: Nick Thompson <nick.thompson@gefanuc.com>
Diffstat (limited to 'include/asm-arm')
-rw-r--r--include/asm-arm/arch-davinci/emif_defs.h14
1 files changed, 10 insertions, 4 deletions
diff --git a/include/asm-arm/arch-davinci/emif_defs.h b/include/asm-arm/arch-davinci/emif_defs.h
index c91e30c..d67292f 100644
--- a/include/asm-arm/arch-davinci/emif_defs.h
+++ b/include/asm-arm/arch-davinci/emif_defs.h
@@ -51,10 +51,7 @@ typedef struct {
dv_reg NANDFCR;
dv_reg NANDFSR;
u_int8_t RSVD1[8];
- dv_reg NANDF1ECC;
- dv_reg NANDF2ECC;
- dv_reg NANDF3ECC;
- dv_reg NANDF4ECC;
+ dv_reg NANDFECC[4];
u_int8_t RSVD2[60];
dv_reg NAND4BITECCLOAD;
dv_reg NAND4BITECC1;
@@ -68,4 +65,13 @@ typedef struct {
} emif_registers;
typedef emif_registers *emifregs;
+
+#define DAVINCI_NANDFCR_4BIT_ECC_SEL_MASK (3 << 4)
+#define DAVINCI_NANDFCR_4BIT_ECC_SEL(n) ((n-2) << 4)
+
+#define DAVINCI_NANDFCR_1BIT_ECC_START(n) (1 << (8 + (n-2)))
+
+#define DAVINCI_NANDFCR_4BIT_ECC_START (1 << 12)
+#define DAVINCI_NANDFCR_4BIT_CALC_START (1 << 13)
+
#endif