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authorLily Zhang <r58066@freescale.com>2010-12-27 14:39:14 +0800
committerLily Zhang <r58066@freescale.com>2010-12-28 10:22:33 +0800
commit07ce4f0a2fee112bd3043d162b201abd65a52b6c (patch)
treee9368614d8d09a5342668ed355717df630578740 /include/asm-arm
parent2205133fb6fdea1393933e332ed693d82d922dba (diff)
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ENGR00137372 MX53: Switch back to use DCD and update DDR scripts
1. This patch is used to switch back to use DCD for flash header instead of plug-in. This change request is due to the following reasons: 1) U-boot community doesn't accept current plug-in solution when upstreaming. 2) Plug-in isn't supported by MX53 ROM serial download mode. No effective workaround is found now. To use the same code base to support normal U-Boot and MFG tool better, adopt DCD solution firstly. 3) Current MX53 DDR scripts don't exceed the length limitation of DCD. For MX53 TO2.0 EVK/ARM2 board, raise DDR frequency to 400MHZ after VCC and VDDA voltages are raised as 1.3V. Since ARM2 CPU2 board share the same script with EVK, delete ARM2 CPU2 config files. ARM2 CPU2 board can share the same bootloader with EVK. 2. Update MX53 DDR2 scripts for TO1.0/TO2.0 EVK/ARD/ARM2 boards The script "MX53_TO2_DDR2_EVK_ARD.inc" is located under http://compass.freescale.net/livelink/livelink? func=ll&objId=221058910&objAction=browse&viewType=1 This script is published by ATX and FIL team on Dec 16th, 2010 3. Update MX53 ARM2 CPU3 DDR3 script "MX53_TO2_DDR3_CPU3.inc" under the same compass folder Signed-off-by: Lily Zhang <r58066@freescale.com>
Diffstat (limited to 'include/asm-arm')
-rw-r--r--include/asm-arm/arch-mx53/mx53.h7
1 files changed, 3 insertions, 4 deletions
diff --git a/include/asm-arm/arch-mx53/mx53.h b/include/asm-arm/arch-mx53/mx53.h
index d574841..eb83ae5 100644
--- a/include/asm-arm/arch-mx53/mx53.h
+++ b/include/asm-arm/arch-mx53/mx53.h
@@ -24,10 +24,9 @@
#define __REG8(x) (*((volatile u8 *)(x)))
/*
- * ROM address which denotes silicon rev
- */
-#define ROM_SI_REV 0x48
-
+ *ROM address which denotes silicon rev
+ */
+#define ROM_SI_REV 0x48
/*
* SATA
*/