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author | Terry Lv <r65388@freescale.com> | 2009-12-10 11:26:52 +0800 |
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committer | Terry Lv <r65388@freescale.com> | 2009-12-11 12:44:24 +0800 |
commit | 1ee27e13d6fdb19d297f8d1d6d3d7d8449d0361e (patch) | |
tree | 90de615a82637ea82d8f81914ea6a5249b85512b /include/asm-arm/proc-armv | |
parent | 270ba8ac5b8c52a0b4fcf0d77eb66ac647c7f37c (diff) | |
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ENGR00119171: ubifs support for android recovery mode.
ubifs support for android recovery mode.
Signed-off-by: Terry Lv <r65388@freescale.com>
Diffstat (limited to 'include/asm-arm/proc-armv')
-rw-r--r-- | include/asm-arm/proc-armv/system.h | 30 |
1 files changed, 0 insertions, 30 deletions
diff --git a/include/asm-arm/proc-armv/system.h b/include/asm-arm/proc-armv/system.h index e7b0fe6..b4cfa68 100644 --- a/include/asm-arm/proc-armv/system.h +++ b/include/asm-arm/proc-armv/system.h @@ -12,36 +12,6 @@ #include <linux/config.h> -#define set_cr(x) \ - __asm__ __volatile__( \ - "mcr p15, 0, %0, c1, c0 @ set CR" \ - : : "r" (x)) - -#define CR_M (1 << 0) /* MMU enable */ -#define CR_A (1 << 1) /* Alignment abort enable */ -#define CR_C (1 << 2) /* Dcache enable */ -#define CR_W (1 << 3) /* Write buffer enable */ -#define CR_P (1 << 4) /* 32-bit exception handler */ -#define CR_D (1 << 5) /* 32-bit data address range */ -#define CR_L (1 << 6) /* Implementation defined */ -#define CD_B (1 << 7) /* Big endian */ -#define CR_S (1 << 8) /* System MMU protection */ -#define CD_R (1 << 9) /* ROM MMU protection */ -#define CR_F (1 << 10) /* Implementation defined */ -#define CR_Z (1 << 11) /* Implementation defined */ -#define CR_I (1 << 12) /* Icache enable */ -#define CR_V (1 << 13) /* Vectors relocated to 0xffff0000 */ -#define CR_RR (1 << 14) /* Round Robin cache replacement */ - -extern unsigned long cr_no_alignment; /* defined in entry-armv.S */ -extern unsigned long cr_alignment; /* defined in entry-armv.S */ - -#if __LINUX_ARM_ARCH__ >= 4 -#define vectors_base() ((cr_alignment & CR_V) ? 0xffff0000 : 0) -#else -#define vectors_base() (0) -#endif - /* * Save the current interrupt enable state & disable IRQs */ |