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authorAllen Xu <allen.xu@freescale.com>2011-11-03 11:15:48 +0800
committerAllen Xu <allen.xu@freescale.com>2011-11-03 11:29:26 +0800
commit13b7fad6b3fc8034738543f5946378239aae440f (patch)
tree12e3d8a4c7462ac6d38c22cb9261c512b748b2bc /include/asm-arm/arch-mx6/mx6.h
parent01a080fe6c11de531f79d0a05d7a06dac1708e41 (diff)
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ENGR00161254 MX6Q: Add NAND support in Uboot
Add iomux and clock setting in Uboot code to support NAND, due to the conflict between NAND and SD, NAND function is not enabled in default configuration. Signed-off-by: Allen Xu <allen.xu@freescale.com>
Diffstat (limited to 'include/asm-arm/arch-mx6/mx6.h')
-rw-r--r--include/asm-arm/arch-mx6/mx6.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/include/asm-arm/arch-mx6/mx6.h b/include/asm-arm/arch-mx6/mx6.h
index 1a984de..ae52fa2 100644
--- a/include/asm-arm/arch-mx6/mx6.h
+++ b/include/asm-arm/arch-mx6/mx6.h
@@ -169,6 +169,9 @@
#define CSD1_DDR_BASE_ADDR MMDC1_ARB_BASE_ADDR
#define CS0_BASE_ADDR WEIM_ARB_BASE_ADDR
#define NAND_FLASH_BASE_ADDR APBH_DMA_ARB_BASE_ADDR
+#define ABPHDMA_BASE_ADDR APBH_DMA_ARB_BASE_ADDR
+#define GPMI_BASE_ADDR (APBH_DMA_ARB_BASE_ADDR + 0x02000)
+#define BCH_BASE_ADDR (APBH_DMA_ARB_BASE_ADDR + 0x04000)
/* Defines for Blocks connected via AIPS (SkyBlue) */
#define ATZ1_BASE_ADDR AIPS1_ARB_BASE_ADDR
@@ -652,6 +655,8 @@ enum mxc_clock {
MXC_ESDHC4_CLK,
MXC_SATA_CLK,
MXC_NFC_CLK,
+ MXC_GPMI_CLK,
+ MXC_BCH_CLK,
};
enum mxc_peri_clocks {