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| author | Lily Zhang <r58066@freescale.com> | 2010-09-19 16:21:56 +0800 |
|---|---|---|
| committer | Lily Zhang <r58066@freescale.com> | 2010-09-20 22:21:17 +0800 |
| commit | 8c2a96af771ee994d3d30f8c3f3e86bb7ed91d18 (patch) | |
| tree | 992d1e40a39ccfc7ed1276225d1d740bc6c33faf /include/asm-arm/arch-mx53 | |
| parent | ce931c240eb5fc03fd1df850e1a1b9dd995baeda (diff) | |
| download | u-boot-imx-8c2a96af771ee994d3d30f8c3f3e86bb7ed91d18.zip u-boot-imx-8c2a96af771ee994d3d30f8c3f3e86bb7ed91d18.tar.gz u-boot-imx-8c2a96af771ee994d3d30f8c3f3e86bb7ed91d18.tar.bz2 | |
ENGR00131705-2 Add MX53 ARD support
Add MX53 Automotive Reference Board (ARD) support
1. Add DDR2 initialization script
2. Add external ethernet support
3. Update PIN settings for UART, I2C, SDHC etc
Signed-off-by: Anish Trivedi <anish@freescale.com>
Signed-off-by: Terry Lv <r65388@freescale.com>
Signed-off-by: Lily Zhang <r58066@freescale.com>
Diffstat (limited to 'include/asm-arm/arch-mx53')
| -rw-r--r-- | include/asm-arm/arch-mx53/iomux.h | 4 | ||||
| -rw-r--r-- | include/asm-arm/arch-mx53/mx53.h | 5 |
2 files changed, 7 insertions, 2 deletions
diff --git a/include/asm-arm/arch-mx53/iomux.h b/include/asm-arm/arch-mx53/iomux.h index 2184863..f17bd7f 100644 --- a/include/asm-arm/arch-mx53/iomux.h +++ b/include/asm-arm/arch-mx53/iomux.h @@ -62,8 +62,8 @@ typedef enum iomux_pad_config { PAD_CTL_DRV_MAX = 0x3 << 1, PAD_CTL_ODE_OPENDRAIN_NONE = 0x0 << 3, PAD_CTL_ODE_OPENDRAIN_ENABLE = 0x1 << 3, - PAD_CTL_100K_PD = 0x0 << 4, - PAD_CTL_47K_PU = 0x1 << 4, + PAD_CTL_360K_PD = 0x0 << 4, + PAD_CTL_75K_PU = 0x1 << 4, PAD_CTL_100K_PU = 0x2 << 4, PAD_CTL_22K_PU = 0x3 << 4, PAD_CTL_PUE_KEEPER = 0x0 << 6, diff --git a/include/asm-arm/arch-mx53/mx53.h b/include/asm-arm/arch-mx53/mx53.h index 8c4f877..ab49a2f 100644 --- a/include/asm-arm/arch-mx53/mx53.h +++ b/include/asm-arm/arch-mx53/mx53.h @@ -167,6 +167,11 @@ #define CSD0_BASE_ADDR 0x70000000 #define CSD1_BASE_ADDR 0xB0000000 +#define CS0_BASE_ADDR 0xF0000000 +#define CS1_BASE_ADDR 0xF4000000 +#define CS2_BASE_ADDR 0xF8000000 +#define CS3_BASE_ADDR 0xFC000000 +#define CS4_BASE_ADDR 0xFE000000 /* * Interrupt numbers */ |