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authorStefano Babic <sbabic@denx.de>2010-03-05 17:54:37 +0100
committerTom Rix <Tom.Rix@windriver.com>2010-03-07 12:36:36 -0600
commite4d34492017c95e4041ea0c581e1ab8d1d49381b (patch)
tree3badc8c1ab6433507c7c9d6993ad7aaacb47bf4f /include/asm-arm/arch-mx51/imx-regs.h
parent9d69e33d8d0f112fe3a089101d023e87431684d1 (diff)
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MX51: removed warnings for the mx51evk
The patch removes warnings at compile time and provides some cleanup code: - Removed comment on NAND (not yet supported) from lowlevel_init.S - Removed NFMS bit definition from imx-regs.h The bit is only related to MX.25/35 and can lead to confusion - Moved is_soc_rev() to soc specific code (removed from mx51evk.c) Signed-off-by: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'include/asm-arm/arch-mx51/imx-regs.h')
-rw-r--r--include/asm-arm/arch-mx51/imx-regs.h21
1 files changed, 0 insertions, 21 deletions
diff --git a/include/asm-arm/arch-mx51/imx-regs.h b/include/asm-arm/arch-mx51/imx-regs.h
index 927eda3..3887d3c 100644
--- a/include/asm-arm/arch-mx51/imx-regs.h
+++ b/include/asm-arm/arch-mx51/imx-regs.h
@@ -209,16 +209,6 @@
#ifndef __ASSEMBLY__
-enum mxc_clock {
- MXC_ARM_CLK = 0,
- MXC_AHB_CLK,
- MXC_IPG_CLK,
- MXC_IPG_PERCLK,
- MXC_UART_CLK,
- MXC_CSPI_CLK,
- MXC_FEC_CLK,
-};
-
struct clkctl {
u32 ccr;
u32 ccdr;
@@ -266,17 +256,6 @@ struct weim {
u32 cswcr2;
};
-/*!
- * NFMS bit in RCSR register for pagesize of nandflash
- */
-#define NFMS (*((volatile u32 *)(CCM_BASE_ADDR+0x18)))
-#define NFMS_BIT 8
-#define NFMS_NF_DWIDTH 14
-#define NFMS_NF_PG_SZ 8
-
-extern unsigned int get_board_rev(void);
-extern int is_soc_rev(int rev);
-
#endif /* __ASSEMBLER__*/
#endif /* __ASM_ARCH_MXC_MX51_H__ */