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authorTerry Lv <r65388@freescale.com>2011-09-16 16:48:44 +0800
committerTerry Lv <r65388@freescale.com>2011-10-18 10:13:57 +0800
commite7cdad7018f5921a651d06ef84a01b0c0dd7a5f1 (patch)
tree09f71121ed0341461cb2325060f677450582eb5f /include/asm-arm/arch-mx35
parent856b3602d1f175706ceb54df4388e406bd3c6ff5 (diff)
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ENGR00156930: Update MX35 DDR2 scripts
Update MX35 DDR2 scripts for that when enabling 256MB, the CSD1 is not stable. 1. Add CSD1 configs to support 256M RAM. 2. Add mx35 TO2 256M RAM configs. 3. Update DDR init code in lowlevel_init.S for external boot. Signed-off-by: Terry Lv <r65388@freescale.com>
Diffstat (limited to 'include/asm-arm/arch-mx35')
-rw-r--r--include/asm-arm/arch-mx35/mmu.h17
1 files changed, 11 insertions, 6 deletions
diff --git a/include/asm-arm/arch-mx35/mmu.h b/include/asm-arm/arch-mx35/mmu.h
index 1b15dba..6cdc44c 100644
--- a/include/asm-arm/arch-mx35/mmu.h
+++ b/include/asm-arm/arch-mx35/mmu.h
@@ -1,5 +1,5 @@
/*
- * Copyright 2004-2010 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright (C) 2004-2011 Freescale Semiconductor, Inc. All Rights Reserved.
*/
/*
@@ -138,10 +138,11 @@ union ARM_MMU_FIRST_LEVEL_DESCRIPTOR {
*/
inline unsigned long iomem_to_phys(unsigned long virt)
{
- if (virt < 0x08000000)
- return (unsigned long)(virt | PHYS_SDRAM_1);
-
- if ((virt & 0xF0000000) == PHYS_SDRAM_1)
+ if (((virt & 0xF0000000) == PHYS_SDRAM_1)
+#ifdef CONFIG_MX35_256M_RAM
+ || ((virt & 0xF0000000) == PHYS_SDRAM_2)
+#endif
+ )
return (unsigned long)(virt & (~0x08000000));
return (unsigned long)virt;
@@ -161,7 +162,11 @@ void *__ioremap(unsigned long offset, size_t size, unsigned long flags)
if (1 == flags) {
/* 0x88000000~0x87FFFFFF is uncacheable meory
space which is mapped to SDRAM */
- if ((offset & 0xF0000000) == PHYS_SDRAM_1)
+ if ((offset & 0xF0000000) == PHYS_SDRAM_1
+#ifdef CONFIG_MX35_256M_RAM
+ || ((offset & 0xF0000000) == PHYS_SDRAM_2)
+#endif
+ )
return (void *)(offset | 0x08000000);
else
return NULL;