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| author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2008-10-16 15:01:15 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2008-10-18 21:54:03 +0200 |
| commit | 6d0f6bcf337c5261c08fabe12982178c2c489d76 (patch) | |
| tree | ae13958ffa9c6b58c2ea97aac07a4ad2f04a350f /include/asm-arm/arch-davinci | |
| parent | 71edc271816ec82cf0550dd6980be2da3cc2ad9e (diff) | |
| download | u-boot-imx-6d0f6bcf337c5261c08fabe12982178c2c489d76.zip u-boot-imx-6d0f6bcf337c5261c08fabe12982178c2c489d76.tar.gz u-boot-imx-6d0f6bcf337c5261c08fabe12982178c2c489d76.tar.bz2 | |
rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'include/asm-arm/arch-davinci')
| -rw-r--r-- | include/asm-arm/arch-davinci/nand_defs.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/include/asm-arm/arch-davinci/nand_defs.h b/include/asm-arm/arch-davinci/nand_defs.h index 619bd47..187d3c3 100644 --- a/include/asm-arm/arch-davinci/nand_defs.h +++ b/include/asm-arm/arch-davinci/nand_defs.h @@ -31,9 +31,9 @@ #define MASK_CLE 0x10 #define MASK_ALE 0x0a -#define NAND_CE0CLE ((volatile u_int8_t *)(CFG_NAND_BASE + 0x10)) -#define NAND_CE0ALE ((volatile u_int8_t *)(CFG_NAND_BASE + 0x0a)) -#define NAND_CE0DATA ((volatile u_int8_t *)CFG_NAND_BASE) +#define NAND_CE0CLE ((volatile u_int8_t *)(CONFIG_SYS_NAND_BASE + 0x10)) +#define NAND_CE0ALE ((volatile u_int8_t *)(CONFIG_SYS_NAND_BASE + 0x0a)) +#define NAND_CE0DATA ((volatile u_int8_t *)CONFIG_SYS_NAND_BASE) typedef struct { u_int32_t NRCSR; @@ -89,7 +89,7 @@ typedef volatile nand_registers *nandregs; #define NAND_READ_END 0x30 #define NAND_STATUS 0x70 -#ifdef CFG_NAND_HW_ECC +#ifdef CONFIG_SYS_NAND_HW_ECC #define NAND_Ecc_P1e (1 << 0) #define NAND_Ecc_P2e (1 << 1) #define NAND_Ecc_P4e (1 << 2) |