diff options
author | Stelian Pop <stelian@popies.net> | 2008-03-26 19:52:31 +0100 |
---|---|---|
committer | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2008-04-01 01:45:48 +0200 |
commit | 177e8a5ac81bbc531a1d54abdb47f2860266c3aa (patch) | |
tree | dcbf12a1bf2957bf42ffce4e3c1944afde6544fe /include/asm-arm/arch-at91sam9/at91_spi.h | |
parent | 6d1dbbbf9fdf727384002e553e615c15d8b967f4 (diff) | |
download | u-boot-imx-177e8a5ac81bbc531a1d54abdb47f2860266c3aa.zip u-boot-imx-177e8a5ac81bbc531a1d54abdb47f2860266c3aa.tar.gz u-boot-imx-177e8a5ac81bbc531a1d54abdb47f2860266c3aa.tar.bz2 |
Finish header files reworking
Replace AT91CAP9.h file with several splitted header files coming
from the Linux kernel.
This is part 2 of the replacement: more header imports and edits.
Signed-off-by: Stelian Pop <stelian@popies.net>
Diffstat (limited to 'include/asm-arm/arch-at91sam9/at91_spi.h')
-rw-r--r-- | include/asm-arm/arch-at91sam9/at91_spi.h | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/include/asm-arm/arch-at91sam9/at91_spi.h b/include/asm-arm/arch-at91sam9/at91_spi.h index f9b9a84..aaad926 100644 --- a/include/asm-arm/arch-at91sam9/at91_spi.h +++ b/include/asm-arm/arch-at91sam9/at91_spi.h @@ -78,4 +78,28 @@ #define AT91_SPI_DLYBS (0xff << 16) /* Delay before SPCK */ #define AT91_SPI_DLYBCT (0xff << 24) /* Delay between Consecutive Transfers */ +#define AT91_SPI_RPR 0x0100 /* Receive Pointer Register */ + +#define AT91_SPI_RCR 0x0104 /* Receive Counter Register */ + +#define AT91_SPI_TPR 0x0108 /* Transmit Pointer Register */ + +#define AT91_SPI_TCR 0x010c /* Transmit Counter Register */ + +#define AT91_SPI_RNPR 0x0110 /* Receive Next Pointer Register */ + +#define AT91_SPI_RNCR 0x0114 /* Receive Next Counter Register */ + +#define AT91_SPI_TNPR 0x0118 /* Transmit Next Pointer Register */ + +#define AT91_SPI_TNCR 0x011c /* Transmit Next Counter Register */ + +#define AT91_SPI_PTCR 0x0120 /* PDC Transfer Control Register */ +#define AT91_SPI_RXTEN (0x1 << 0) /* Receiver Transfer Enable */ +#define AT91_SPI_RXTDIS (0x1 << 1) /* Receiver Transfer Disable */ +#define AT91_SPI_TXTEN (0x1 << 8) /* Transmitter Transfer Enable */ +#define AT91_SPI_TXTDIS (0x1 << 9) /* Transmitter Transfer Disable */ + +#define AT91_SPI_PTSR 0x0124 /* PDC Transfer Status Register */ + #endif |