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author | Wolfgang Denk <wd@pollux.(none)> | 2005-09-26 01:26:56 +0200 |
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committer | Wolfgang Denk <wd@pollux.(none)> | 2005-09-26 01:26:56 +0200 |
commit | d8e7e0f0442f6af9e925dfa33bb6a30b513aa329 (patch) | |
tree | bad589bc4a43f88a5d1388c7f3a38eba9a56bca3 /include/asm-arm/arch-at91rm9200/AT91RM9200.h | |
parent | 98404649c82b1069ee95a5d455556092bc0ea901 (diff) | |
download | u-boot-imx-d8e7e0f0442f6af9e925dfa33bb6a30b513aa329.zip u-boot-imx-d8e7e0f0442f6af9e925dfa33bb6a30b513aa329.tar.gz u-boot-imx-d8e7e0f0442f6af9e925dfa33bb6a30b513aa329.tar.bz2 |
Add support for AT91RM9200 OHCI Controller.
Patch by Eric Benard, 07 Apr 2005
Diffstat (limited to 'include/asm-arm/arch-at91rm9200/AT91RM9200.h')
-rw-r--r-- | include/asm-arm/arch-at91rm9200/AT91RM9200.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/include/asm-arm/arch-at91rm9200/AT91RM9200.h b/include/asm-arm/arch-at91rm9200/AT91RM9200.h index b47e713..2639ad3 100644 --- a/include/asm-arm/arch-at91rm9200/AT91RM9200.h +++ b/include/asm-arm/arch-at91rm9200/AT91RM9200.h @@ -592,6 +592,9 @@ AT91S_PDC, *AT91PS_PDC; /* ========== Register definition ==================================== */ #define AT91C_SPI_CSR ((AT91_REG *) 0xFFFE0030) /* (SPI) Chip Select Register */ #define AT91C_PMC_PCER ((AT91_REG *) 0xFFFFFC10) /* (PMC) Peripheral Clock Enable Register */ +#define AT91C_PMC_PCDR ((AT91_REG *) 0xFFFFFC14) /* (PMC) Peripheral Clock Enable Register */ +#define AT91C_PMC_SCER ((AT91_REG *) 0xFFFFFC00) /* (PMC) Peripheral Clock Enable Register */ +#define AT91C_PMC_SCDR ((AT91_REG *) 0xFFFFFC04) /* (PMC) Peripheral Clock Enable Register */ #define AT91C_PIOA_PER ((AT91_REG *) 0xFFFFF400) /* (PIOA) PIO Enable Register */ #define AT91C_PIOA_PDR ((AT91_REG *) 0xFFFFF404) /* (PIOA) PIO Disable Register */ #define AT91C_PIOA_PSR ((AT91_REG *) 0xFFFFF408) /* (PIOA) PIO Status Register */ @@ -649,6 +652,7 @@ AT91S_PDC, *AT91PS_PDC; #define AT91C_ID_TWI ((unsigned int) 12) /* Two Wire Interface */ #define AT91C_ID_SPI ((unsigned int) 13) /* Serial Peripheral Interface */ #define AT91C_ID_TC0 ((unsigned int) 17) /* Timer Counter 0 */ +#define AT91C_ID_UHP ((unsigned int) 23) /* OHCI USB Host Port */ #define AT91C_ID_EMAC ((unsigned int) 24) /* Ethernet MAC */ #define AT91C_PIO_PC1 ((unsigned int) 1 << 1) /* Pin Controlled by PC1 */ |