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author | Wolfgang Denk <wd@pollux.denx.de> | 2005-10-09 01:41:48 +0200 |
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committer | Wolfgang Denk <wd@pollux.denx.de> | 2005-10-09 01:41:48 +0200 |
commit | 3df5bea0b0bddc196bf952c51d1dd54d966b82ba (patch) | |
tree | bb76917676431534c036b74511cfccb264fbcf12 /include/asm-arm/arch-arm720t/netarm_registers.h | |
parent | 7521af1c7d95ff087a4f7636ed050f4d4be91b59 (diff) | |
download | u-boot-imx-3df5bea0b0bddc196bf952c51d1dd54d966b82ba.zip u-boot-imx-3df5bea0b0bddc196bf952c51d1dd54d966b82ba.tar.gz u-boot-imx-3df5bea0b0bddc196bf952c51d1dd54d966b82ba.tar.bz2 |
Add support for NetSilicon NS7520 processor.
Patch by Art Shipkowski, 12 May 2005
Cleanup.
Diffstat (limited to 'include/asm-arm/arch-arm720t/netarm_registers.h')
-rw-r--r-- | include/asm-arm/arch-arm720t/netarm_registers.h | 19 |
1 files changed, 18 insertions, 1 deletions
diff --git a/include/asm-arm/arch-arm720t/netarm_registers.h b/include/asm-arm/arch-arm720t/netarm_registers.h index 029c7f4..fa88128 100644 --- a/include/asm-arm/arch-arm720t/netarm_registers.h +++ b/include/asm-arm/arch-arm720t/netarm_registers.h @@ -1,6 +1,9 @@ /* * linux/include/asm-arm/arch-netarm/netarm_registers.h * + * Copyright (C) 2005 + * Art Shipkowski, Videon Central, Inc., <art@videon-central.com> + * * Copyright (C) 2000, 2001 NETsilicon, Inc. * Copyright (C) 2000, 2001 WireSpeed Communications Corporation * @@ -27,6 +30,8 @@ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. * * author(s) : Joe deBlaquiere + * + * Modified to support NS7520 by Art Shipkowski. */ #ifndef __NET_ARM_REGISTERS_H @@ -38,6 +43,8 @@ /* the input crystal/clock frequency ( in Hz ) */ #define NETARM_XTAL_FREQ_25MHz (18432000) #define NETARM_XTAL_FREQ_33MHz (23698000) +#define NETARM_XTAL_FREQ_48MHz (48000000) +#define NETARM_XTAL_FREQ_55MHz (55000000) #define NETARM_XTAL_FREQ_EMLIN1 (20000000) /* the frequency of SYS_CLK */ @@ -60,12 +67,22 @@ #define NETARM_PLL_COUNT_VAL 4 #define NETARM_XTAL_FREQ NETARM_XTAL_FREQ_25MHz -#else /* CONFIG_NETARM_NET50 */ +#elif defined(CONFIG_NETARM_NET50) /* NET+50 boards: 40 MHz (with NETARM_XTAL_FREQ_25MHz) */ #define NETARM_PLL_COUNT_VAL 8 #define NETARM_XTAL_FREQ NETARM_XTAL_FREQ_25MHz +#else /* CONFIG_NETARM_NS7520 */ + +#define NETARM_PLL_COUNT_VAL 0 + +#if defined(CONFIG_BOARD_UNC20) +#define NETARM_XTAL_FREQ NETARM_XTAL_FREQ_48MHz +#else +#define NETARM_XTAL_FREQ NETARM_XTAL_FREQ_55MHz +#endif + #endif /* #include "arm_registers.h" */ |