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authorJon Loeliger <jdl@freescale.com>2008-06-06 10:48:31 -0500
committerJon Loeliger <jdl@freescale.com>2008-06-06 10:48:31 -0500
commit1a247ba7fa5fb09f56892a09a990f03ce564b3e2 (patch)
tree9dab0ef013cc6dc7883454808ecf6ba4d7a7a94e /include/asm-arm/arch-arm720t/netarm_mem_module.h
parent2c289e320dcfb3760e99cf1d765cb067194a1202 (diff)
parent8155efbd7ae9c65564ca98affe94631d612ae088 (diff)
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Merge commit 'wd/master'
Diffstat (limited to 'include/asm-arm/arch-arm720t/netarm_mem_module.h')
-rw-r--r--include/asm-arm/arch-arm720t/netarm_mem_module.h18
1 files changed, 9 insertions, 9 deletions
diff --git a/include/asm-arm/arch-arm720t/netarm_mem_module.h b/include/asm-arm/arch-arm720t/netarm_mem_module.h
index f0529fd..c650c3b 100644
--- a/include/asm-arm/arch-arm720t/netarm_mem_module.h
+++ b/include/asm-arm/arch-arm720t/netarm_mem_module.h
@@ -170,15 +170,15 @@
/* Option B Registers (0xFFC0_00x8) */
#define NETARM_MEM_OPTB_SYNC_1_STAGE (0x00000001)
#define NETARM_MEM_OPTB_SYNC_2_STAGE (0x00000002)
-#define NETARM_MEM_OPTB_BCYC_PLUS0 (0x00000000)
-#define NETARM_MEM_OPTB_BCYC_PLUS4 (0x00000004)
-#define NETARM_MEM_OPTB_BCYC_PLUS8 (0x00000008)
-#define NETARM_MEM_OPTB_BCYC_PLUS12 (0x0000000C)
-
-#define NETARM_MEM_OPTB_WAIT_PLUS0 (0x00000000)
-#define NETARM_MEM_OPTB_WAIT_PLUS16 (0x00000010)
-#define NETARM_MEM_OPTB_WAIT_PLUS32 (0x00000020)
-#define NETARM_MEM_OPTB_WAIT_PLUS48 (0x00000030)
+#define NETARM_MEM_OPTB_BCYC_PLUS0 (0x00000000)
+#define NETARM_MEM_OPTB_BCYC_PLUS4 (0x00000004)
+#define NETARM_MEM_OPTB_BCYC_PLUS8 (0x00000008)
+#define NETARM_MEM_OPTB_BCYC_PLUS12 (0x0000000C)
+
+#define NETARM_MEM_OPTB_WAIT_PLUS0 (0x00000000)
+#define NETARM_MEM_OPTB_WAIT_PLUS16 (0x00000010)
+#define NETARM_MEM_OPTB_WAIT_PLUS32 (0x00000020)
+#define NETARM_MEM_OPTB_WAIT_PLUS48 (0x00000030)
#endif
#endif