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author | Stefan Roese <sr@denx.de> | 2008-01-13 15:04:37 +0100 |
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committer | Stefan Roese <sr@denx.de> | 2008-01-13 15:04:37 +0100 |
commit | 8d79953d03e6c5b24215609997dafe4daa623cd6 (patch) | |
tree | cb9a4246cde2d32fa600461da008c7d59b57cf4b /include/asm-arm/arch-arm1136/mux.h | |
parent | 47cc23cbe9a669c510183f4f049bf703ef445f3b (diff) | |
parent | 2b2f43ed6a30ece77f76191c845ac95267daa31a (diff) | |
download | u-boot-imx-8d79953d03e6c5b24215609997dafe4daa623cd6.zip u-boot-imx-8d79953d03e6c5b24215609997dafe4daa623cd6.tar.gz u-boot-imx-8d79953d03e6c5b24215609997dafe4daa623cd6.tar.bz2 |
Merge branch 'master' of /home/stefan/git/u-boot/u-boot
Diffstat (limited to 'include/asm-arm/arch-arm1136/mux.h')
-rw-r--r-- | include/asm-arm/arch-arm1136/mux.h | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/include/asm-arm/arch-arm1136/mux.h b/include/asm-arm/arch-arm1136/mux.h index 67c8419..4fdb9c6 100644 --- a/include/asm-arm/arch-arm1136/mux.h +++ b/include/asm-arm/arch-arm1136/mux.h @@ -28,6 +28,7 @@ typedef unsigned int uint32; void muxSetupSDRC(void); void muxSetupGPMC(void); void muxSetupUsb0(void); +void muxSetupUsbHost(void); void muxSetupUart3(void); void muxSetupI2C1(void); void muxSetupUART1(void); @@ -53,6 +54,10 @@ void muxSetupHDQ(void); #define CONTROL_PADCONF_GPMC_NCS0_BYTE1 ((volatile unsigned char *)0x4800008D) #define CONTROL_PADCONF_GPMC_NCS0_BYTE2 ((volatile unsigned char *)0x4800008E) #define CONTROL_PADCONF_GPMC_NCS0_BYTE3 ((volatile unsigned char *)0x4800008F) +#define CONTROL_PADCONF_GPMC_NCS0_BYTE4 (0x48000090) +#define CONTROL_PADCONF_GPMC_NCS0_BYTE5 (0x48000091) +#define CONTROL_PADCONF_GPMC_NCS0_BYTE6 (0x48000092) +#define CONTROL_PADCONF_GPMC_NCS0_BYTE7 (0x48000093) /* Pin Muxing registers used for SDRC */ #define CONTROL_PADCONF_SDRC_NCS0_BYTE0 ((volatile unsigned char *)0x480000A0) @@ -70,6 +75,7 @@ void muxSetupHDQ(void); #define CONTROL_PADCONF_SPI1_SIMO ((volatile unsigned char *)0x48000100) #define CONTROL_PADCONF_SPI1_SOMI ((volatile unsigned char *)0x48000101) #define CONTROL_PADCONF_SPI1_NCS0 ((volatile unsigned char *)0x48000102) +#define CONTROL_PADCONF_SPI1_NCS1 (0x48000103) #define CONTROL_PADCONF_MCBSP1_FSR ((volatile unsigned char *)0x4800010B) @@ -151,8 +157,20 @@ void muxSetupHDQ(void); #define CONTROL_PADCONF_USB0_SE0 ((volatile uint8 *)0x48000122) #define CONTROL_PADCONF_USB0_DAT ((volatile uint8 *)0x48000123) +/* Pin Muxing registres used for USB1. */ +#define CONTROL_PADCONF_USB1_RCV (0x480000EB) +#define CONTROL_PADCONF_USB1_TXEN (0x480000EC) + /* Pin Muxing registers used for UART3/IRDA */ #define CONTROL_PADCONF_UART3_TX_IRTX ((volatile uint8 *)0x48000118) #define CONTROL_PADCONF_UART3_RX_IRRX ((volatile uint8 *)0x48000119) +/* Pin Muxing registers used for GPIO */ +#define CONTROL_PADCONF_GPIO69 (0x480000ED) +#define CONTROL_PADCONF_GPIO70 (0x480000EE) +#define CONTROL_PADCONF_GPIO102 (0x48000116) +#define CONTROL_PADCONF_GPIO103 (0x48000117) +#define CONTROL_PADCONF_GPIO104 (0x48000118) +#define CONTROL_PADCONF_GPIO105 (0x48000119) + #endif |