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authorStefano Babic <sbabic@denx.de>2012-02-22 00:24:39 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2012-05-15 08:31:30 +0200
commit9f472e6540f5632ce27b779d841a006d1c1b3d55 (patch)
tree76e5576fc0981e75afefa0878e854bc45fd84a4b /include/ahci.h
parent8c38b5d03d701134b7d6e4eeea94c229f7470d27 (diff)
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SATA: add driver for MX5 / MX6 SOCs
This driver is part of Freescale's LTIB for MX5 / MX6. Signed-off-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Terry Lv <r65388@freescale.com> CC: Fabio Estevam <fabio.estevam@freescale.com> CC: Dirk Behme <dirk.behme@de.bosch.com>
Diffstat (limited to 'include/ahci.h')
-rw-r--r--include/ahci.h5
1 files changed, 3 insertions, 2 deletions
diff --git a/include/ahci.h b/include/ahci.h
index 465ea7f..c4fb9e7 100644
--- a/include/ahci.h
+++ b/include/ahci.h
@@ -30,12 +30,13 @@
#define AHCI_PCI_BAR 0x24
#define AHCI_MAX_SG 56 /* hardware max is 64K */
#define AHCI_CMD_SLOT_SZ 32
+#define AHCI_MAX_CMD_SLOT 32
#define AHCI_RX_FIS_SZ 256
#define AHCI_CMD_TBL_HDR 0x80
#define AHCI_CMD_TBL_CDB 0x40
#define AHCI_CMD_TBL_SZ AHCI_CMD_TBL_HDR + (AHCI_MAX_SG * 16)
-#define AHCI_PORT_PRIV_DMA_SZ AHCI_CMD_SLOT_SZ + AHCI_CMD_TBL_SZ \
- + AHCI_RX_FIS_SZ
+#define AHCI_PORT_PRIV_DMA_SZ (AHCI_CMD_SLOT_SZ * AHCI_MAX_CMD_SLOT + \
+ AHCI_CMD_TBL_SZ + AHCI_RX_FIS_SZ)
#define AHCI_CMD_ATAPI (1 << 5)
#define AHCI_CMD_WRITE (1 << 6)
#define AHCI_CMD_PREFETCH (1 << 7)