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| author | Franck Jullien <franck.jullien@gmail.com> | 2014-05-21 22:43:49 +0200 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2014-06-05 14:44:56 -0400 |
| commit | c346cf13509c9bfcd98c679a9822bb346432b9b6 (patch) | |
| tree | e780e1d48bde6ffeef1aae67acffb2e76a0c66d3 /include/ACEX1K.h | |
| parent | 08be2836df0b07aac65fea583b762335569fd47a (diff) | |
| download | u-boot-imx-c346cf13509c9bfcd98c679a9822bb346432b9b6.zip u-boot-imx-c346cf13509c9bfcd98c679a9822bb346432b9b6.tar.gz u-boot-imx-c346cf13509c9bfcd98c679a9822bb346432b9b6.tar.bz2 | |
openrisc: update SPR registers definition
The OpenRISC architecture specification v1.0 defines
new SPR registers. This patch adds registers definition
for group 0 and update bit definitions for the CPU
configuration register.
Signed-off-by: Franck Jullien <franck.jullien@gmail.com>
Diffstat (limited to 'include/ACEX1K.h')
0 files changed, 0 insertions, 0 deletions