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| author | York Sun <yorksun@freescale.com> | 2014-10-27 11:31:32 -0700 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2014-12-05 08:06:08 -0800 |
| commit | ed9e4e427295623197d8dd76a1ca9ac15e085572 (patch) | |
| tree | 406d2f16e72d4406d8516fcd1bfb4de330bb3bb9 /include/ACEX1K.h | |
| parent | 2519cb344ee7911ab2f6643449f5dcc32cec9653 (diff) | |
| download | u-boot-imx-ed9e4e427295623197d8dd76a1ca9ac15e085572.zip u-boot-imx-ed9e4e427295623197d8dd76a1ca9ac15e085572.tar.gz u-boot-imx-ed9e4e427295623197d8dd76a1ca9ac15e085572.tar.bz2 | |
mpc85xx/t208xqds: Adjust DDR timing parameters
Adjust timing for dual-rank UDIMM, verified on M3CQ-8GHS3C0E for speed of
1066, 1333, 1600, 1866MT/s. The 1866 timing is copied to 2133 timing in
case such DIMM comes available.
Also update single-rank 1866 timing. Enable interactive debugging as well.
Signed-off-by: York Sun <yorksun@freescale.com>
CC: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Diffstat (limited to 'include/ACEX1K.h')
0 files changed, 0 insertions, 0 deletions