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| author | Stephen Warren <swarren@nvidia.com> | 2014-06-11 16:03:34 -0600 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2014-08-09 11:16:58 -0400 |
| commit | 7ac1b410ac9b66150170718a6f807ce52ffd8400 (patch) | |
| tree | 1823b2c0b7926e258b371f43630d00769be657ca /include/ACEX1K.h | |
| parent | dd64827eb60de9f71b1a1d6aecf488104cdd7b96 (diff) | |
| download | u-boot-imx-7ac1b410ac9b66150170718a6f807ce52ffd8400.zip u-boot-imx-7ac1b410ac9b66150170718a6f807ce52ffd8400.tar.gz u-boot-imx-7ac1b410ac9b66150170718a6f807ce52ffd8400.tar.bz2 | |
dfu: allow backend to specify a maximum buffer size
CONFIG_SYS_DFU_DATA_BUF_SIZE may be large to allow for FAT/ext layouts
to transfer large files. However, this means that individual write
operations will take a long time. Allow backends to specify a maximum
buffer size, so that each write operation is limited to a smaller data
block. This prevents the DFU protocol from timing out when e.g. writing
to SPI flash. I would guess that NAND might benefit from setting this
value too, but I can't test that.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'include/ACEX1K.h')
0 files changed, 0 insertions, 0 deletions