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authorYork Sun <yorksun@freescale.com>2014-09-11 13:32:06 -0700
committerYork Sun <yorksun@freescale.com>2014-09-25 08:36:20 -0700
commitf80d6472b47e73e35e4eaed6fc56ce5df2c82cdb (patch)
tree0d8686b5543a221089465049b6366fc993b826a1 /fs/reiserfs
parent8aeb893a8ed97bac679149386cec53b275be3715 (diff)
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driver/ddr/fsl: Fix DDR4 driver
When accumulated ECC is enabled, the DQ_MAP for ECC[4:7] needs to be set to 0, i.e. 0->0, 1->1, etc., required by controller logic, even these pins are not actually connected. Also fix a bug when reading from DDR register to use proper accessor for correct endianess. Signed-off-by: York Sun <yorksun@freescale.com>
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