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author | Tom Warren <twarren.nvidia@gmail.com> | 2014-01-24 10:16:17 -0700 |
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committer | Tom Warren <twarren@nvidia.com> | 2014-02-03 09:46:44 -0700 |
commit | 0b01b53aa54d44a7f9a09bdfdc3d84fe1e1069fe (patch) | |
tree | 57f47726f244cbf8d0b55d1f544d4d0f9286857e /examples | |
parent | 09266b270fb8bba934317d2d5a22063ac45bf960 (diff) | |
download | u-boot-imx-0b01b53aa54d44a7f9a09bdfdc3d84fe1e1069fe.zip u-boot-imx-0b01b53aa54d44a7f9a09bdfdc3d84fe1e1069fe.tar.gz u-boot-imx-0b01b53aa54d44a7f9a09bdfdc3d84fe1e1069fe.tar.bz2 |
ARM: tegra: deduplicate MASK_BITS_xxx clock mux enum
The enum used to define the set of register bits used to represent a
clock's input mux, MUX_BITS_*, is defined separately for each SoC at
present. Move this definition to a common location to ease fixing up
some issues with the definition, and the code that uses it.
Signed-off-by: Tom Warren <twarren@nvidia.com>
[swarren, extracted from a larger patch by Tom]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'examples')
0 files changed, 0 insertions, 0 deletions