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author | Stephen Warren <swarren@nvidia.com> | 2014-03-21 12:28:54 -0600 |
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committer | Tom Warren <twarren@nvidia.com> | 2014-04-17 08:41:05 -0700 |
commit | e296995767e645ed047bcbec90923297a24d4d5a (patch) | |
tree | 0ff4f2cf5c6982a2cd2f5fe9d05db5d26ad9dc59 /examples | |
parent | 19ed7b4ecf6bdcf991d0a63aac3faa80b6df43cb (diff) | |
download | u-boot-imx-e296995767e645ed047bcbec90923297a24d4d5a.zip u-boot-imx-e296995767e645ed047bcbec90923297a24d4d5a.tar.gz u-boot-imx-e296995767e645ed047bcbec90923297a24d4d5a.tar.bz2 |
ARM: tegra: pinctrl: remove duplication
Much of arch/arm/cpu/tegra*-common/pinmux.c is identical. Remove the
duplication by creating pinmux-common.c for all the identical code.
This leaves:
* arch/arm/include/asm/arch-tegra*/pinmux.h defining only the names of
the various pins/pin groups, drive groups, and mux functions.
* arch/arm/cpu/tegra*-common/pinmux.c containing only the lookup table
stating which pin groups support which mux functions.
The code in pinmux-common.c is semantically identical to that in the
various original pinmux.c, but had some consistency and cleanup fixes
applied during migration.
I removed the definition of struct pmux_tri_ctlr, since this is different
between SoCs (especially Tegra20 vs all others), and it's much simpler to
deal with this via the new REG/MUX_REG/... defines. spl.c, warmboot.c,
and warmboot_avp.c needed updates due to this, since they previously
hijacked this struct to encode the location of some non-pinmux registers.
Now, that code simply calculates these register addresses directly using
simple and obvious math. I like this method better irrespective of the
pinmux code cleanup anyway.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'examples')
0 files changed, 0 insertions, 0 deletions