Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx

3 files changed, 39 insertions, 20 deletions

diff --git a/drivers/misc/fsl_law.c b/drivers/misc/fsl_law.c
index 287e555..8255175 100644
--- a/drivers/misc/fsl_law.c
+++ b/drivers/misc/fsl_law.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2008-2009 Freescale Semiconductor, Inc.
+ * Copyright 2008-2010 Freescale Semiconductor, Inc.
  *
  * (C) Copyright 2000
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
@@ -39,6 +39,8 @@ DECLARE_GLOBAL_DATA_PTR;
 #define FSL_HW_NUM_LAWS 10
 #elif defined(CONFIG_MPC8536) || defined(CONFIG_MPC8572) || \
       defined(CONFIG_P1011) || defined(CONFIG_P1020) || \
+      defined(CONFIG_P1012) || defined(CONFIG_P1021) || \
+      defined(CONFIG_P1013) || defined(CONFIG_P1022) || \
       defined(CONFIG_P2010) || defined(CONFIG_P2020)
 #define FSL_HW_NUM_LAWS 12
 #elif defined(CONFIG_PPC_P4080)
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index e665b5e..0f6f8b1 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2007, Freescale Semiconductor, Inc
+ * Copyright 2007,2010 Freescale Semiconductor, Inc
  * Andy Fleming
  *
  * Based vaguely on the pxa mmc code:
@@ -110,8 +110,7 @@ static int esdhc_setup_data(struct mmc *mmc, struct mmc_data *data)
 		if (wml_value > 0x10)
 			wml_value = 0x10;
 
-		wml_value = 0x100000 | wml_value;
-
+		esdhc_clrsetbits32(&regs->wml, WML_RD_WML_MASK, wml_value);
 		esdhc_write32(&regs->dsaddr, (u32)data->dest);
 	} else {
 		if (wml_value > 0x80)
@@ -120,12 +119,12 @@ static int esdhc_setup_data(struct mmc *mmc, struct mmc_data *data)
 			printf("\nThe SD card is locked. Can not write to a locked card.\n\n");
 			return TIMEOUT;
 		}
-		wml_value = wml_value << 16 | 0x10;
+
+		esdhc_clrsetbits32(&regs->wml, WML_WR_WML_MASK,
+					wml_value << 16);
 		esdhc_write32(&regs->dsaddr, (u32)data->src);
 	}
 
-	esdhc_write32(&regs->wml, wml_value);
-
 	esdhc_write32(&regs->blkattr, data->blocks << 16 | data->blocksize);
 
 	/* Calculate the timeout period for data transactions */
@@ -265,18 +264,13 @@ void set_sysctl(struct mmc *mmc, uint clock)
 
 	clk = (pre_div << 8) | (div << 4);
 
-	/* On imx the clock must be stopped before changing frequency */
-	if (cfg->clk_enable)
-		esdhc_clrbits32(&regs->sysctl, SYSCTL_CKEN);
+	esdhc_clrbits32(&regs->sysctl, SYSCTL_CKEN);
 
 	esdhc_clrsetbits32(&regs->sysctl, SYSCTL_CLOCK_MASK, clk);
 
 	udelay(10000);
 
-	clk = SYSCTL_PEREN;
-	/* On imx systems the clock must be explicitely enabled */
-	if (cfg->clk_enable)
-		clk |= SYSCTL_CKEN;
+	clk = SYSCTL_PEREN | SYSCTL_CKEN;
 
 	esdhc_setbits32(&regs->sysctl, clk);
 }
@@ -349,6 +343,20 @@ static int esdhc_init(struct mmc *mmc)
 	return ret;
 }
 
+static void esdhc_reset(struct fsl_esdhc *regs)
+{
+	unsigned long timeout = 100; /* wait max 100 ms */
+
+	/* reset the controller */
+	esdhc_write32(&regs->sysctl, SYSCTL_RSTA);
+
+	/* hardware clears the bit when it is done */
+	while ((esdhc_read32(&regs->sysctl) & SYSCTL_RSTA) && --timeout)
+		udelay(1000);
+	if (!timeout)
+		printf("MMC/SD: Reset never completed.\n");
+}
+
 int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg)
 {
 	struct fsl_esdhc *regs;
@@ -363,6 +371,9 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg)
 	sprintf(mmc->name, "FSL_ESDHC");
 	regs = (struct fsl_esdhc *)cfg->esdhc_base;
 
+	/* First reset the eSDHC controller */
+	esdhc_reset(regs);
+
 	mmc->priv = cfg;
 	mmc->send_cmd = esdhc_send_cmd;
 	mmc->set_ios = esdhc_set_ios;
diff --git a/drivers/pci/fsl_pci_init.c b/drivers/pci/fsl_pci_init.c
index fe57926..5a63fa2 100644
--- a/drivers/pci/fsl_pci_init.c
+++ b/drivers/pci/fsl_pci_init.c
@@ -1,9 +1,10 @@
 /*
- * Copyright 2007-2009 Freescale Semiconductor, Inc.
+ * Copyright 2007-2010 Freescale Semiconductor, Inc.
  *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * Version 2 as published by the Free Software Foundation.
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 of the License, or (at your option)
+ * any later version.
  *
  * This program is distributed in the hope that it will be useful,
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -513,10 +514,15 @@ void ft_fsl_pci_setup(void *blob, const char *pci_alias,
 			struct pci_controller *hose)
 {
 	int off = fdt_path_offset(blob, pci_alias);
+	u32 bus_range[2];
 
-	if (off >= 0) {
-		u32 bus_range[2];
+	if (off < 0)
+		return;
 
+	/* We assume a cfg_addr not being set means we didn't setup the controller */
+	if ((hose == NULL) || (hose->cfg_addr == NULL)) {
+		fdt_del_node_and_alias(blob, pci_alias);
+	} else {
 		bus_range[0] = 0;
 		bus_range[1] = hose->last_busno - hose->first_busno;
 		fdt_setprop(blob, off, "bus-range", &bus_range[0], 2*4);