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authorTom Rini <trini@konsulko.com>2016-07-21 10:40:35 -0400
committerTom Rini <trini@konsulko.com>2016-07-21 10:40:35 -0400
commit45031f1a1e575bf2e5ceb3e6e9f5b8b09f4945a1 (patch)
treef54c93c5b98014d59d28bffe5e4c5b6ce1e96621 /drivers
parent55edb9d4d521ff733d217ddf47ad7bf4650676be (diff)
parent747431b9d54d3ebdef87352006218ed948011612 (diff)
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Merge branch 'master' of git://git.denx.de/u-boot-sh
Diffstat (limited to 'drivers')
-rw-r--r--drivers/serial/serial_sh.c31
1 files changed, 31 insertions, 0 deletions
diff --git a/drivers/serial/serial_sh.c b/drivers/serial/serial_sh.c
index 8693c1e..ef7cf0f 100644
--- a/drivers/serial/serial_sh.c
+++ b/drivers/serial/serial_sh.c
@@ -17,6 +17,8 @@
#include <dm/platform_data/serial_sh.h>
#include "serial_sh.h"
+DECLARE_GLOBAL_DATA_PTR;
+
#if defined(CONFIG_CPU_SH7760) || \
defined(CONFIG_CPU_SH7780) || \
defined(CONFIG_CPU_SH7785) || \
@@ -201,9 +203,36 @@ static const struct dm_serial_ops sh_serial_ops = {
.setbrg = sh_serial_setbrg,
};
+#ifdef CONFIG_OF_CONTROL
+static const struct udevice_id sh_serial_id[] ={
+ {.compatible = "renesas,sci", .data = PORT_SCI},
+ {.compatible = "renesas,scif", .data = PORT_SCIF},
+ {.compatible = "renesas,scifa", .data = PORT_SCIFA},
+ {}
+};
+
+static int sh_serial_ofdata_to_platdata(struct udevice *dev)
+{
+ struct sh_serial_platdata *plat = dev_get_platdata(dev);
+ fdt_addr_t addr;
+
+ addr = fdtdec_get_addr(gd->fdt_blob, dev->of_offset, "reg");
+ if (addr == FDT_ADDR_T_NONE)
+ return -EINVAL;
+
+ plat->base = addr;
+ plat->clk = fdtdec_get_int(gd->fdt_blob, dev->of_offset, "clock", 1);
+ plat->type = dev_get_driver_data(dev);
+ return 0;
+}
+#endif
+
U_BOOT_DRIVER(serial_sh) = {
.name = "serial_sh",
.id = UCLASS_SERIAL,
+ .of_match = of_match_ptr(sh_serial_id),
+ .ofdata_to_platdata = of_match_ptr(sh_serial_ofdata_to_platdata),
+ .platdata_auto_alloc_size = sizeof(struct sh_serial_platdata),
.probe = sh_serial_probe,
.ops = &sh_serial_ops,
.flags = DM_FLAG_PRE_RELOC,
@@ -234,6 +263,8 @@ U_BOOT_DRIVER(serial_sh) = {
#if defined(CONFIG_SCIF_A)
#define SCIF_BASE_PORT PORT_SCIFA
+#elif defined(CONFIG_SCI)
+ #define SCIF_BASE_PORT PORT_SCI
#else
#define SCIF_BASE_PORT PORT_SCIF
#endif