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author | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2013-12-06 14:26:51 +0100 |
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committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2013-12-06 14:26:51 +0100 |
commit | c35cf8dc9fd90ff108abe08527df042bcd29a02f (patch) | |
tree | a5b962854f9a1a2659207f41204840b2b98078bd /drivers | |
parent | 7988bd4ed6b48127ac8b45cf144255daabaa1250 (diff) | |
parent | 18a02e8050b7af165efa72325753e7880bf5567c (diff) | |
download | u-boot-imx-c35cf8dc9fd90ff108abe08527df042bcd29a02f.zip u-boot-imx-c35cf8dc9fd90ff108abe08527df042bcd29a02f.tar.gz u-boot-imx-c35cf8dc9fd90ff108abe08527df042bcd29a02f.tar.bz2 |
Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/block/ahci.c | 18 | ||||
-rw-r--r-- | drivers/net/cpsw.c | 2 | ||||
-rw-r--r-- | drivers/power/twl6030.c | 77 | ||||
-rw-r--r-- | drivers/usb/host/ehci-omap.c | 57 |
4 files changed, 122 insertions, 32 deletions
diff --git a/drivers/block/ahci.c b/drivers/block/ahci.c index 0daad36..e64df4f 100644 --- a/drivers/block/ahci.c +++ b/drivers/block/ahci.c @@ -379,6 +379,11 @@ static int ahci_init_one(pci_dev_t pdev) int rc; probe_ent = malloc(sizeof(struct ahci_probe_ent)); + if (!probe_ent) { + printf("%s: No memory for probe_ent\n", __func__); + return -ENOMEM; + } + memset(probe_ent, 0, sizeof(struct ahci_probe_ent)); probe_ent->dev = pdev; @@ -503,7 +508,7 @@ static int ahci_port_start(u8 port) mem = (u32) malloc(AHCI_PORT_PRIV_DMA_SZ + 2048); if (!mem) { free(pp); - printf("No mem for table!\n"); + printf("%s: No mem for table!\n", __func__); return -ENOMEM; } @@ -618,7 +623,7 @@ static int ata_scsiop_inquiry(ccb *pccb) 95 - 4, }; u8 fis[20]; - u16 *tmpid; + ALLOC_CACHE_ALIGN_BUFFER(u16, tmpid, ATA_ID_WORDS); u8 port; /* Clean ccb data buffer */ @@ -637,14 +642,10 @@ static int ata_scsiop_inquiry(ccb *pccb) /* Read id from sata */ port = pccb->target; - tmpid = malloc(ATA_ID_WORDS * 2); - if (!tmpid) - return -ENOMEM; if (ahci_device_data_io(port, (u8 *) &fis, sizeof(fis), (u8 *)tmpid, ATA_ID_WORDS * 2, 0)) { debug("scsi_ahci: SCSI inquiry command failure.\n"); - free(tmpid); return -EIO; } @@ -889,6 +890,11 @@ int ahci_init(u32 base) u32 linkmap; probe_ent = malloc(sizeof(struct ahci_probe_ent)); + if (!probe_ent) { + printf("%s: No memory for probe_ent\n", __func__); + return -ENOMEM; + } + memset(probe_ent, 0, sizeof(struct ahci_probe_ent)); probe_ent->host_flags = ATA_FLAG_SATA diff --git a/drivers/net/cpsw.c b/drivers/net/cpsw.c index 39240d9..50167aa 100644 --- a/drivers/net/cpsw.c +++ b/drivers/net/cpsw.c @@ -914,7 +914,7 @@ static int cpsw_recv(struct eth_device *dev) void *buffer; int len; - cpsw_update_link(priv); + cpsw_check_link(priv); while (cpdma_process(priv, &priv->rx_chan, &buffer, &len) >= 0) { invalidate_dcache_range((unsigned long)buffer, diff --git a/drivers/power/twl6030.c b/drivers/power/twl6030.c index 0858b60..a1c6663 100644 --- a/drivers/power/twl6030.c +++ b/drivers/power/twl6030.c @@ -9,6 +9,26 @@ #include <twl6030.h> +static struct twl6030_data *twl; + +static struct twl6030_data twl6030_info = { + .chip_type = chip_TWL6030, + .adc_rbase = GPCH0_LSB, + .adc_ctrl = CTRL_P2, + .adc_enable = CTRL_P2_SP2, + .vbat_mult = TWL6030_VBAT_MULT, + .vbat_shift = TWL6030_VBAT_SHIFT, +}; + +static struct twl6030_data twl6032_info = { + .chip_type = chip_TWL6032, + .adc_rbase = TWL6032_GPCH0_LSB, + .adc_ctrl = TWL6032_CTRL_P1, + .adc_enable = CTRL_P1_SP1, + .vbat_mult = TWL6032_VBAT_MULT, + .vbat_shift = TWL6032_VBAT_SHIFT, +}; + static int twl6030_gpadc_read_channel(u8 channel_no) { u8 lsb = 0; @@ -16,12 +36,12 @@ static int twl6030_gpadc_read_channel(u8 channel_no) int ret = 0; ret = twl6030_i2c_read_u8(TWL6030_CHIP_ADC, - GPCH0_LSB + channel_no * 2, &lsb); + twl->adc_rbase + channel_no * 2, &lsb); if (ret) return ret; ret = twl6030_i2c_read_u8(TWL6030_CHIP_ADC, - GPCH0_MSB + channel_no * 2, &msb); + twl->adc_rbase + 1 + channel_no * 2, &msb); if (ret) return ret; @@ -33,7 +53,8 @@ static int twl6030_gpadc_sw2_trigger(void) u8 val; int ret = 0; - ret = twl6030_i2c_write_u8(TWL6030_CHIP_ADC, CTRL_P2, CTRL_P2_SP2); + ret = twl6030_i2c_write_u8(TWL6030_CHIP_ADC, + twl->adc_ctrl, twl->adc_enable); if (ret) return ret; @@ -41,7 +62,8 @@ static int twl6030_gpadc_sw2_trigger(void) val = CTRL_P2_BUSY; while (!((val & CTRL_P2_EOCP2) && (!(val & CTRL_P2_BUSY)))) { - ret = twl6030_i2c_read_u8(TWL6030_CHIP_ADC, CTRL_P2, &val); + ret = twl6030_i2c_read_u8(TWL6030_CHIP_ADC, + twl->adc_ctrl, &val); if (ret) return ret; udelay(1000); @@ -102,6 +124,18 @@ int twl6030_get_battery_voltage(void) { int battery_volt = 0; int ret = 0; + u8 vbatch; + + if (twl->chip_type == chip_TWL6030) { + vbatch = TWL6030_GPADC_VBAT_CHNL; + } else { + ret = twl6030_i2c_write_u8(TWL6030_CHIP_ADC, + TWL6032_GPSELECT_ISB, + TWL6032_GPADC_VBAT_CHNL); + if (ret) + return ret; + vbatch = 0; + } /* Start GPADC SW conversion */ ret = twl6030_gpadc_sw2_trigger(); @@ -111,12 +145,12 @@ int twl6030_get_battery_voltage(void) } /* measure Vbat voltage */ - battery_volt = twl6030_gpadc_read_channel(7); + battery_volt = twl6030_gpadc_read_channel(vbatch); if (battery_volt < 0) { printf("Failed to read battery voltage\n"); return ret; } - battery_volt = (battery_volt * 25 * 1000) >> (10 + 2); + battery_volt = (battery_volt * twl->vbat_mult) >> twl->vbat_shift; printf("Battery Voltage: %d mV\n", battery_volt); return battery_volt; @@ -124,12 +158,35 @@ int twl6030_get_battery_voltage(void) void twl6030_init_battery_charging(void) { - u8 stat1 = 0; + u8 val = 0; int battery_volt = 0; int ret = 0; + ret = twl6030_i2c_read_u8(TWL6030_CHIP_USB, USB_PRODUCT_ID_LSB, &val); + if (ret) { + puts("twl6030_init_battery_charging(): could not determine chip!\n"); + return; + } + if (val == 0x30) { + twl = &twl6030_info; + } else if (val == 0x32) { + twl = &twl6032_info; + } else { + puts("twl6030_init_battery_charging(): unsupported chip type\n"); + return; + } + /* Enable VBAT measurement */ - twl6030_i2c_write_u8(TWL6030_CHIP_PM, MISC1, VBAT_MEAS); + if (twl->chip_type == chip_TWL6030) { + twl6030_i2c_write_u8(TWL6030_CHIP_PM, MISC1, VBAT_MEAS); + twl6030_i2c_write_u8(TWL6030_CHIP_ADC, + TWL6030_GPADC_CTRL, + GPADC_CTRL_SCALER_DIV4); + } else { + twl6030_i2c_write_u8(TWL6030_CHIP_ADC, + TWL6032_GPADC_CTRL2, + GPADC_CTRL2_CH18_SCALER_EN); + } /* Enable GPADC module */ ret = twl6030_i2c_write_u8(TWL6030_CHIP_CHARGER, TOGGLE1, FGS | GPADCS); @@ -146,10 +203,10 @@ void twl6030_init_battery_charging(void) printf("Main battery voltage too low!\n"); /* Check for the presence of USB charger */ - twl6030_i2c_read_u8(TWL6030_CHIP_CHARGER, CONTROLLER_STAT1, &stat1); + twl6030_i2c_read_u8(TWL6030_CHIP_CHARGER, CONTROLLER_STAT1, &val); /* check for battery presence indirectly via Fuel gauge */ - if ((stat1 & VBUS_DET) && (battery_volt < 3300)) + if ((val & VBUS_DET) && (battery_volt < 3300)) twl6030_start_usb_charging(); return; diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c index c4ce487..1b215c2 100644 --- a/drivers/usb/host/ehci-omap.c +++ b/drivers/usb/host/ehci-omap.c @@ -28,21 +28,48 @@ static struct omap_ehci *const ehci = (struct omap_ehci *)OMAP_EHCI_BASE; static int omap_uhh_reset(void) { -/* - * Soft resetting the UHH module causes instability issues on - * all OMAPs so we just avoid it. - * - * See OMAP36xx Errata - * i571: USB host EHCI may stall when entering smart-standby mode - * i660: USBHOST Configured In Smart-Idle Can Lead To a Deadlock - * - * On OMAP4/5, soft-resetting the UHH module will put it into - * Smart-Idle mode and lead to a deadlock. - * - * On OMAP3, this doesn't seem to be the case but still instabilities - * are observed on beagle (3530 ES1.0) if soft-reset is used. - * e.g. NFS root failures with Linux kernel. - */ + int timeout = 0; + u32 rev; + + rev = readl(&uhh->rev); + + /* Soft RESET */ + writel(OMAP_UHH_SYSCONFIG_SOFTRESET, &uhh->sysc); + + switch (rev) { + case OMAP_USBHS_REV1: + /* Wait for soft RESET to complete */ + while (!(readl(&uhh->syss) & 0x1)) { + if (timeout > 100) { + printf("%s: RESET timeout\n", __func__); + return -1; + } + udelay(10); + timeout++; + } + + /* Set No-Idle, No-Standby */ + writel(OMAP_UHH_SYSCONFIG_VAL, &uhh->sysc); + break; + + default: /* Rev. 2 onwards */ + + udelay(2); /* Need to wait before accessing SYSCONFIG back */ + + /* Wait for soft RESET to complete */ + while ((readl(&uhh->sysc) & 0x1)) { + if (timeout > 100) { + printf("%s: RESET timeout\n", __func__); + return -1; + } + udelay(10); + timeout++; + } + + writel(OMAP_UHH_SYSCONFIG_VAL, &uhh->sysc); + break; + } + return 0; } |