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authorWolfgang Denk <wd@denx.de>2011-05-18 14:31:56 +0200
committerWolfgang Denk <wd@denx.de>2011-05-18 14:31:56 +0200
commit0ea91423f47461bf7eaed2d4aff198076dd07fd5 (patch)
treeb5201f976fe3f7f5ed6f485f7ef81d8d8c9ec033 /drivers
parentce6400a0f88f9648d6def519244ea8c33c7612b2 (diff)
parent24890f11980eb70d835ca7e0b00d32284d8f546c (diff)
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Merge branch 'master' of git://git.denx.de/u-boot-arm
* 'master' of git://git.denx.de/u-boot-arm: (40 commits) avr32: add ATAG_BOARDINFO at91: reworked support for otc570 board at91: reworked support for meesc board hammerhead: move CONFIG_SYS_TEXT_BASE to header mimc200: move CONFIG_SYS_TEXT_BASE to header favr-32-ezkit: move CONFIG_SYS_TEXT_BASE to header atstk100x: move CONFIG_SYS_TEXT_BASE to header atngw100: move CONFIG_SYS_TEXT_BASE to header mimc200: fix "#define XXXX 1" hammerhead: fix "#define XXXX 1" favr-32-ezkit: fix "#define XXXX 1" atstk1006: fix "#define XXXX 1" atstk1004: fix "#define XXXX 1" atstk1003: fix "#define XXXX 1" atstk1002: fix "#define XXXX 1" atngw100: fix "#define XXXX 1" avr32: use single linker script avr32/config.mk: simplify PLATFORM_RELFLAGS avr32: fix linking Add support for Bluewater Systems Snapper 9260 and 9G20 modules ...
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpio/at91_gpio.c54
-rw-r--r--drivers/mmc/atmel_mci.c2
-rw-r--r--drivers/mmc/atmel_mci.h4
-rw-r--r--drivers/mmc/gen_atmel_mci.c2
-rw-r--r--drivers/net/macb.c14
-rw-r--r--drivers/rtc/at91sam9_rtt.c14
-rw-r--r--drivers/serial/atmel_usart.c28
-rw-r--r--drivers/spi/atmel_dataflash_spi.c94
-rw-r--r--drivers/spi/atmel_spi.c16
-rw-r--r--drivers/usb/host/ohci-at91.c18
-rw-r--r--drivers/watchdog/at91sam9_wdt.c6
11 files changed, 135 insertions, 117 deletions
diff --git a/drivers/gpio/at91_gpio.c b/drivers/gpio/at91_gpio.c
index c0a97bc..be2a026 100644
--- a/drivers/gpio/at91_gpio.c
+++ b/drivers/gpio/at91_gpio.c
@@ -24,19 +24,29 @@
* MA 02111-1307 USA
*/
+/*
+ * WARNING:
+ *
+ * As the code is right now, it expects all PIO ports A,B,C,...
+ * to be evenly spaced in the memory map:
+ * ATMEL_BASE_PIOA + port * sizeof at91pio_t
+ * This might not necessaryly be true in future Atmel SoCs.
+ * This code should be fixed to use a pointer array to the ports.
+ */
+
#include <config.h>
#include <common.h>
+#include <asm/io.h>
#include <asm/sizes.h>
#include <asm/arch/hardware.h>
-#include <asm/arch/io.h>
#include <asm/arch/at91_pio.h>
int at91_set_pio_pullup(unsigned port, unsigned pin, int use_pullup)
{
- at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
+ at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA;
u32 mask;
- if ((port < AT91_PIO_PORTS) && (pin < 32)) {
+ if ((port < ATMEL_PIO_PORTS) && (pin < 32)) {
mask = 1 << pin;
if (use_pullup)
writel(1 << pin, &pio->port[port].puer);
@@ -52,10 +62,10 @@ int at91_set_pio_pullup(unsigned port, unsigned pin, int use_pullup)
*/
int at91_set_pio_periph(unsigned port, unsigned pin, int use_pullup)
{
- at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
+ at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA;
u32 mask;
- if ((port < AT91_PIO_PORTS) && (pin < 32)) {
+ if ((port < ATMEL_PIO_PORTS) && (pin < 32)) {
mask = 1 << pin;
writel(mask, &pio->port[port].idr);
at91_set_pio_pullup(port, pin, use_pullup);
@@ -69,10 +79,10 @@ int at91_set_pio_periph(unsigned port, unsigned pin, int use_pullup)
*/
int at91_set_a_periph(unsigned port, unsigned pin, int use_pullup)
{
- at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
+ at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA;
u32 mask;
- if ((port < AT91_PIO_PORTS) && (pin < 32)) {
+ if ((port < ATMEL_PIO_PORTS) && (pin < 32)) {
mask = 1 << pin;
writel(mask, &pio->port[port].idr);
at91_set_pio_pullup(port, pin, use_pullup);
@@ -87,10 +97,10 @@ int at91_set_a_periph(unsigned port, unsigned pin, int use_pullup)
*/
int at91_set_b_periph(unsigned port, unsigned pin, int use_pullup)
{
- at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
+ at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA;
u32 mask;
- if ((port < AT91_PIO_PORTS) && (pin < 32)) {
+ if ((port < ATMEL_PIO_PORTS) && (pin < 32)) {
mask = 1 << pin;
writel(mask, &pio->port[port].idr);
at91_set_pio_pullup(port, pin, use_pullup);
@@ -106,10 +116,10 @@ int at91_set_b_periph(unsigned port, unsigned pin, int use_pullup)
*/
int at91_set_pio_input(unsigned port, u32 pin, int use_pullup)
{
- at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
+ at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA;
u32 mask;
- if ((port < AT91_PIO_PORTS) && (pin < 32)) {
+ if ((port < ATMEL_PIO_PORTS) && (pin < 32)) {
mask = 1 << pin;
writel(mask, &pio->port[port].idr);
at91_set_pio_pullup(port, pin, use_pullup);
@@ -125,10 +135,10 @@ int at91_set_pio_input(unsigned port, u32 pin, int use_pullup)
*/
int at91_set_pio_output(unsigned port, u32 pin, int value)
{
- at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
+ at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA;
u32 mask;
- if ((port < AT91_PIO_PORTS) && (pin < 32)) {
+ if ((port < ATMEL_PIO_PORTS) && (pin < 32)) {
mask = 1 << pin;
writel(mask, &pio->port[port].idr);
writel(mask, &pio->port[port].pudr);
@@ -147,10 +157,10 @@ int at91_set_pio_output(unsigned port, u32 pin, int value)
*/
int at91_set_pio_deglitch(unsigned port, unsigned pin, int is_on)
{
- at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
+ at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA;
u32 mask;
- if ((port < AT91_PIO_PORTS) && (pin < 32)) {
+ if ((port < ATMEL_PIO_PORTS) && (pin < 32)) {
mask = 1 << pin;
if (is_on)
writel(mask, &pio->port[port].ifer);
@@ -166,10 +176,10 @@ int at91_set_pio_deglitch(unsigned port, unsigned pin, int is_on)
*/
int at91_set_pio_multi_drive(unsigned port, unsigned pin, int is_on)
{
- at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
+ at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA;
u32 mask;
- if ((port < AT91_PIO_PORTS) && (pin < 32)) {
+ if ((port < ATMEL_PIO_PORTS) && (pin < 32)) {
mask = 1 << pin;
if (is_on)
writel(mask, &pio->port[port].mder);
@@ -184,10 +194,10 @@ int at91_set_pio_multi_drive(unsigned port, unsigned pin, int is_on)
*/
int at91_set_pio_value(unsigned port, unsigned pin, int value)
{
- at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
+ at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA;
u32 mask;
- if ((port < AT91_PIO_PORTS) && (pin < 32)) {
+ if ((port < ATMEL_PIO_PORTS) && (pin < 32)) {
mask = 1 << pin;
if (value)
writel(mask, &pio->port[port].sodr);
@@ -202,11 +212,11 @@ int at91_set_pio_value(unsigned port, unsigned pin, int value)
*/
int at91_get_pio_value(unsigned port, unsigned pin)
{
- u32 pdsr = 0;
- at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE;
+ u32 pdsr = 0;
+ at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA;
u32 mask;
- if ((port < AT91_PIO_PORTS) && (pin < 32)) {
+ if ((port < ATMEL_PIO_PORTS) && (pin < 32)) {
mask = 1 << pin;
pdsr = readl(&pio->port[port].pdsr) & mask;
}
diff --git a/drivers/mmc/atmel_mci.c b/drivers/mmc/atmel_mci.c
index 3946ffe..0af8d42 100644
--- a/drivers/mmc/atmel_mci.c
+++ b/drivers/mmc/atmel_mci.c
@@ -28,7 +28,7 @@
#include <asm/errno.h>
#include <asm/byteorder.h>
#include <asm/arch/clk.h>
-#include <asm/arch/memory-map.h>
+#include <asm/arch/hardware.h>
#include "atmel_mci.h"
diff --git a/drivers/mmc/atmel_mci.h b/drivers/mmc/atmel_mci.h
index 823a77d..90ab6a8 100644
--- a/drivers/mmc/atmel_mci.h
+++ b/drivers/mmc/atmel_mci.h
@@ -238,8 +238,8 @@ typedef struct atmel_mci {
* Register access macros
*/
#define mmci_readl(reg) \
- readl((void *)MMCI_BASE + MMCI_##reg)
+ readl((void *)ATMEL_BASE_MMCI + MMCI_##reg)
#define mmci_writel(reg,value) \
- writel((value), (void *)MMCI_BASE + MMCI_##reg)
+ writel((value), (void *)ATMEL_BASE_MMCI + MMCI_##reg)
#endif /* __CPU_AT32AP_ATMEL_MCI_H__ */
diff --git a/drivers/mmc/gen_atmel_mci.c b/drivers/mmc/gen_atmel_mci.c
index 6577925..f346b24 100644
--- a/drivers/mmc/gen_atmel_mci.c
+++ b/drivers/mmc/gen_atmel_mci.c
@@ -33,7 +33,7 @@
#include <asm/errno.h>
#include <asm/byteorder.h>
#include <asm/arch/clk.h>
-#include <asm/arch/memory-map.h>
+#include <asm/arch/hardware.h>
#include "atmel_mci.h"
#ifndef CONFIG_SYS_MMC_CLK_OD
diff --git a/drivers/net/macb.c b/drivers/net/macb.c
index acb8d20..72ea1fc 100644
--- a/drivers/net/macb.c
+++ b/drivers/net/macb.c
@@ -469,17 +469,19 @@ static int macb_init(struct eth_device *netdev, bd_t *bd)
/* choose RMII or MII mode. This depends on the board */
#ifdef CONFIG_RMII
-#if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \
- defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20) || \
- defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45)
+#if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \
+ defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20) || \
+ defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45) || \
+ defined(CONFIG_AT91SAM9XE)
macb_writel(macb, USRIO, MACB_BIT(RMII) | MACB_BIT(CLKEN));
#else
macb_writel(macb, USRIO, 0);
#endif
#else
-#if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \
- defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20) || \
- defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45)
+#if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \
+ defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20) || \
+ defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45) || \
+ defined(CONFIG_AT91SAM9XE)
macb_writel(macb, USRIO, MACB_BIT(CLKEN));
#else
macb_writel(macb, USRIO, MACB_BIT(MII));
diff --git a/drivers/rtc/at91sam9_rtt.c b/drivers/rtc/at91sam9_rtt.c
index de8e30d..ff4acb5 100644
--- a/drivers/rtc/at91sam9_rtt.c
+++ b/drivers/rtc/at91sam9_rtt.c
@@ -38,9 +38,9 @@
#include <common.h>
#include <command.h>
#include <rtc.h>
+#include <asm/io.h>
#include <asm/errno.h>
#include <asm/arch/hardware.h>
-#include <asm/arch/io.h>
#include <asm/arch/at91_rtt.h>
#include <asm/arch/at91_gpbr.h>
@@ -48,8 +48,8 @@
int rtc_get (struct rtc_time *tmp)
{
- at91_rtt_t *rtt = (at91_rtt_t *) AT91_RTT_BASE;
- at91_gpbr_t *gpbr = (at91_gpbr_t *) AT91_GPR_BASE;
+ at91_rtt_t *rtt = (at91_rtt_t *) ATMEL_BASE_RTT;
+ at91_gpbr_t *gpbr = (at91_gpbr_t *) ATMEL_BASE_GPBR;
ulong tim;
ulong tim2;
ulong off;
@@ -66,8 +66,8 @@ int rtc_get (struct rtc_time *tmp)
int rtc_set (struct rtc_time *tmp)
{
- at91_rtt_t *rtt = (at91_rtt_t *) AT91_RTT_BASE;
- at91_gpbr_t *gpbr = (at91_gpbr_t *) AT91_GPR_BASE;
+ at91_rtt_t *rtt = (at91_rtt_t *) ATMEL_BASE_RTT;
+ at91_gpbr_t *gpbr = (at91_gpbr_t *) ATMEL_BASE_GPBR;
ulong tim;
tim = mktime (tmp->tm_year, tmp->tm_mon, tmp->tm_mday,
@@ -85,8 +85,8 @@ int rtc_set (struct rtc_time *tmp)
void rtc_reset (void)
{
- at91_rtt_t *rtt = (at91_rtt_t *) AT91_RTT_BASE;
- at91_gpbr_t *gpbr = (at91_gpbr_t *) AT91_GPR_BASE;
+ at91_rtt_t *rtt = (at91_rtt_t *) ATMEL_BASE_RTT;
+ at91_gpbr_t *gpbr = (at91_gpbr_t *) ATMEL_BASE_GPBR;
/* clear alarm, set prescaler to 32768, clear counter */
writel(32768+AT91_RTT_RTTRST, &rtt->mr);
diff --git a/drivers/serial/atmel_usart.c b/drivers/serial/atmel_usart.c
index bfa1f3a..e326b2b 100644
--- a/drivers/serial/atmel_usart.c
+++ b/drivers/serial/atmel_usart.c
@@ -23,21 +23,7 @@
#include <asm/io.h>
#include <asm/arch/clk.h>
-#include <asm/arch/memory-map.h>
-
-#if defined(CONFIG_USART0)
-# define USART_ID 0
-# define USART_BASE USART0_BASE
-#elif defined(CONFIG_USART1)
-# define USART_ID 1
-# define USART_BASE USART1_BASE
-#elif defined(CONFIG_USART2)
-# define USART_ID 2
-# define USART_BASE USART2_BASE
-#elif defined(CONFIG_USART3)
-# define USART_ID 3
-# define USART_BASE USART3_BASE
-#endif
+#include <asm/arch/hardware.h>
#include "atmel_usart.h"
@@ -45,7 +31,7 @@ DECLARE_GLOBAL_DATA_PTR;
void serial_setbrg(void)
{
- atmel_usart3_t *usart = (atmel_usart3_t*)USART_BASE;
+ atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
unsigned long divisor;
unsigned long usart_hz;
@@ -54,14 +40,14 @@ void serial_setbrg(void)
* Baud Rate = --------------
* 16 * CD
*/
- usart_hz = get_usart_clk_rate(USART_ID);
+ usart_hz = get_usart_clk_rate(CONFIG_USART_ID);
divisor = (usart_hz / 16 + gd->baudrate / 2) / gd->baudrate;
writel(USART3_BF(CD, divisor), &usart->brgr);
}
int serial_init(void)
{
- atmel_usart3_t *usart = (atmel_usart3_t*)USART_BASE;
+ atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
writel(USART3_BIT(RSTRX) | USART3_BIT(RSTTX), &usart->cr);
@@ -80,7 +66,7 @@ int serial_init(void)
void serial_putc(char c)
{
- atmel_usart3_t *usart = (atmel_usart3_t*)USART_BASE;
+ atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
if (c == '\n')
serial_putc('\r');
@@ -97,7 +83,7 @@ void serial_puts(const char *s)
int serial_getc(void)
{
- atmel_usart3_t *usart = (atmel_usart3_t*)USART_BASE;
+ atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
while (!(readl(&usart->csr) & USART3_BIT(RXRDY)))
WATCHDOG_RESET();
@@ -106,6 +92,6 @@ int serial_getc(void)
int serial_tstc(void)
{
- atmel_usart3_t *usart = (atmel_usart3_t*)USART_BASE;
+ atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
return (readl(&usart->csr) & USART3_BIT(RXRDY)) != 0;
}
diff --git a/drivers/spi/atmel_dataflash_spi.c b/drivers/spi/atmel_dataflash_spi.c
index 4a5c4aa..9c991e8 100644
--- a/drivers/spi/atmel_dataflash_spi.c
+++ b/drivers/spi/atmel_dataflash_spi.c
@@ -21,13 +21,21 @@
#include <common.h>
#ifndef CONFIG_AT91_LEGACY
-#define CONFIG_AT91_LEGACY
-#warning Please update to use C structur SoC access !
+# define CONFIG_ATMEL_LEGACY
+# warning Please update to use C structure SoC access !
#endif
-#include <asm/arch/hardware.h>
+#include <common.h>
+#include <spi.h>
+#include <malloc.h>
+
+#include <asm/io.h>
+
#include <asm/arch/clk.h>
+#include <asm/arch/hardware.h>
+
+#include "atmel_spi.h"
+
#include <asm/arch/gpio.h>
-#include <asm/arch/io.h>
#include <asm/arch/at91_pio.h>
#include <asm/arch/at91_spi.h>
@@ -41,18 +49,18 @@
void AT91F_SpiInit(void)
{
/* Reset the SPI */
- writel(AT91_SPI_SWRST, AT91_BASE_SPI + AT91_SPI_CR);
+ writel(AT91_SPI_SWRST, ATMEL_BASE_SPI0 + AT91_SPI_CR);
/* Configure SPI in Master Mode with No CS selected !!! */
writel(AT91_SPI_MSTR | AT91_SPI_MODFDIS | AT91_SPI_PCS,
- AT91_BASE_SPI + AT91_SPI_MR);
+ ATMEL_BASE_SPI0 + AT91_SPI_MR);
/* Configure CS0 */
writel(AT91_SPI_NCPHA |
(AT91_SPI_DLYBS & DATAFLASH_TCSS) |
(AT91_SPI_DLYBCT & DATAFLASH_TCHS) |
((get_mck_clk_rate() / AT91_SPI_CLK) << 8),
- AT91_BASE_SPI + AT91_SPI_CSR(0));
+ ATMEL_BASE_SPI0 + AT91_SPI_CSR(0));
#ifdef CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1
/* Configure CS1 */
@@ -60,7 +68,7 @@ void AT91F_SpiInit(void)
(AT91_SPI_DLYBS & DATAFLASH_TCSS) |
(AT91_SPI_DLYBCT & DATAFLASH_TCHS) |
((get_mck_clk_rate() / AT91_SPI_CLK) << 8),
- AT91_BASE_SPI + AT91_SPI_CSR(1));
+ ATMEL_BASE_SPI0 + AT91_SPI_CSR(1));
#endif
#ifdef CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS2
/* Configure CS2 */
@@ -68,7 +76,7 @@ void AT91F_SpiInit(void)
(AT91_SPI_DLYBS & DATAFLASH_TCSS) |
(AT91_SPI_DLYBCT & DATAFLASH_TCHS) |
((get_mck_clk_rate() / AT91_SPI_CLK) << 8),
- AT91_BASE_SPI + AT91_SPI_CSR(2));
+ ATMEL_BASE_SPI0 + AT91_SPI_CSR(2));
#endif
#ifdef CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3
/* Configure CS3 */
@@ -76,21 +84,22 @@ void AT91F_SpiInit(void)
(AT91_SPI_DLYBS & DATAFLASH_TCSS) |
(AT91_SPI_DLYBCT & DATAFLASH_TCHS) |
((get_mck_clk_rate() / AT91_SPI_CLK) << 8),
- AT91_BASE_SPI + AT91_SPI_CSR(3));
+ ATMEL_BASE_SPI0 + AT91_SPI_CSR(3));
#endif
/* SPI_Enable */
- writel(AT91_SPI_SPIEN, AT91_BASE_SPI + AT91_SPI_CR);
+ writel(AT91_SPI_SPIEN, ATMEL_BASE_SPI0 + AT91_SPI_CR);
- while (!(readl(AT91_BASE_SPI + AT91_SPI_SR) & AT91_SPI_SPIENS));
+ while (!(readl(ATMEL_BASE_SPI0 + AT91_SPI_SR) & AT91_SPI_SPIENS))
+ ;
/*
* Add tempo to get SPI in a safe state.
* Should not be needed for new silicon (Rev B)
*/
udelay(500000);
- readl(AT91_BASE_SPI + AT91_SPI_SR);
- readl(AT91_BASE_SPI + AT91_SPI_RDR);
+ readl(ATMEL_BASE_SPI0 + AT91_SPI_SR);
+ readl(ATMEL_BASE_SPI0 + AT91_SPI_RDR);
}
@@ -100,33 +109,33 @@ void AT91F_SpiEnable(int cs)
switch (cs) {
case 0: /* Configure SPI CS0 for Serial DataFlash AT45DBxx */
- mode = readl(AT91_BASE_SPI + AT91_SPI_MR);
+ mode = readl(ATMEL_BASE_SPI0 + AT91_SPI_MR);
mode &= 0xFFF0FFFF;
writel(mode | ((AT91_SPI_PCS0_DATAFLASH_CARD<<16) & AT91_SPI_PCS),
- AT91_BASE_SPI + AT91_SPI_MR);
+ ATMEL_BASE_SPI0 + AT91_SPI_MR);
break;
case 1: /* Configure SPI CS1 for Serial DataFlash AT45DBxx */
- mode = readl(AT91_BASE_SPI + AT91_SPI_MR);
+ mode = readl(ATMEL_BASE_SPI0 + AT91_SPI_MR);
mode &= 0xFFF0FFFF;
writel(mode | ((AT91_SPI_PCS1_DATAFLASH_CARD<<16) & AT91_SPI_PCS),
- AT91_BASE_SPI + AT91_SPI_MR);
+ ATMEL_BASE_SPI0 + AT91_SPI_MR);
break;
case 2: /* Configure SPI CS2 for Serial DataFlash AT45DBxx */
- mode = readl(AT91_BASE_SPI + AT91_SPI_MR);
+ mode = readl(ATMEL_BASE_SPI0 + AT91_SPI_MR);
mode &= 0xFFF0FFFF;
writel(mode | ((AT91_SPI_PCS2_DATAFLASH_CARD<<16) & AT91_SPI_PCS),
- AT91_BASE_SPI + AT91_SPI_MR);
+ ATMEL_BASE_SPI0 + AT91_SPI_MR);
break;
case 3:
- mode = readl(AT91_BASE_SPI + AT91_SPI_MR);
+ mode = readl(ATMEL_BASE_SPI0 + AT91_SPI_MR);
mode &= 0xFFF0FFFF;
writel(mode | ((AT91_SPI_PCS3_DATAFLASH_CARD<<16) & AT91_SPI_PCS),
- AT91_BASE_SPI + AT91_SPI_MR);
+ ATMEL_BASE_SPI0 + AT91_SPI_MR);
break;
}
/* SPI_Enable */
- writel(AT91_SPI_SPIEN, AT91_BASE_SPI + AT91_SPI_CR);
+ writel(AT91_SPI_SPIEN, ATMEL_BASE_SPI0 + AT91_SPI_CR);
}
unsigned int AT91F_SpiWrite1(AT91PS_DataflashDesc pDesc);
@@ -134,37 +143,48 @@ unsigned int AT91F_SpiWrite1(AT91PS_DataflashDesc pDesc);
unsigned int AT91F_SpiWrite(AT91PS_DataflashDesc pDesc)
{
unsigned int timeout;
+ unsigned int timebase;
pDesc->state = BUSY;
- writel(AT91_SPI_TXTDIS + AT91_SPI_RXTDIS, AT91_BASE_SPI + AT91_SPI_PTCR);
+ writel(AT91_SPI_TXTDIS + AT91_SPI_RXTDIS,
+ ATMEL_BASE_SPI0 + AT91_SPI_PTCR);
/* Initialize the Transmit and Receive Pointer */
- writel((unsigned int)pDesc->rx_cmd_pt, AT91_BASE_SPI + AT91_SPI_RPR);
- writel((unsigned int)pDesc->tx_cmd_pt, AT91_BASE_SPI + AT91_SPI_TPR);
+ writel((unsigned int)pDesc->rx_cmd_pt,
+ ATMEL_BASE_SPI0 + AT91_SPI_RPR);
+ writel((unsigned int)pDesc->tx_cmd_pt,
+ ATMEL_BASE_SPI0 + AT91_SPI_TPR);
/* Intialize the Transmit and Receive Counters */
- writel(pDesc->rx_cmd_size, AT91_BASE_SPI + AT91_SPI_RCR);
- writel(pDesc->tx_cmd_size, AT91_BASE_SPI + AT91_SPI_TCR);
+ writel(pDesc->rx_cmd_size, ATMEL_BASE_SPI0 + AT91_SPI_RCR);
+ writel(pDesc->tx_cmd_size, ATMEL_BASE_SPI0 + AT91_SPI_TCR);
if (pDesc->tx_data_size != 0) {
/* Initialize the Next Transmit and Next Receive Pointer */
- writel((unsigned int)pDesc->rx_data_pt, AT91_BASE_SPI + AT91_SPI_RNPR);
- writel((unsigned int)pDesc->tx_data_pt, AT91_BASE_SPI + AT91_SPI_TNPR);
+ writel((unsigned int)pDesc->rx_data_pt,
+ ATMEL_BASE_SPI0 + AT91_SPI_RNPR);
+ writel((unsigned int)pDesc->tx_data_pt,
+ ATMEL_BASE_SPI0 + AT91_SPI_TNPR);
/* Intialize the Next Transmit and Next Receive Counters */
- writel(pDesc->rx_data_size, AT91_BASE_SPI + AT91_SPI_RNCR);
- writel(pDesc->tx_data_size, AT91_BASE_SPI + AT91_SPI_TNCR);
+ writel(pDesc->rx_data_size,
+ ATMEL_BASE_SPI0 + AT91_SPI_RNCR);
+ writel(pDesc->tx_data_size,
+ ATMEL_BASE_SPI0 + AT91_SPI_TNCR);
}
/* arm simple, non interrupt dependent timer */
- reset_timer_masked();
+ timebase = get_timer(0);
timeout = 0;
- writel(AT91_SPI_TXTEN + AT91_SPI_RXTEN, AT91_BASE_SPI + AT91_SPI_PTCR);
- while (!(readl(AT91_BASE_SPI + AT91_SPI_SR) & AT91_SPI_RXBUFF) &&
- ((timeout = get_timer_masked()) < CONFIG_SYS_SPI_WRITE_TOUT));
- writel(AT91_SPI_TXTDIS + AT91_SPI_RXTDIS, AT91_BASE_SPI + AT91_SPI_PTCR);
+ writel(AT91_SPI_TXTEN + AT91_SPI_RXTEN,
+ ATMEL_BASE_SPI0 + AT91_SPI_PTCR);
+ while (!(readl(ATMEL_BASE_SPI0 + AT91_SPI_SR) & AT91_SPI_RXBUFF) &&
+ ((timeout = get_timer(timebase)) < CONFIG_SYS_SPI_WRITE_TOUT))
+ ;
+ writel(AT91_SPI_TXTDIS + AT91_SPI_RXTDIS,
+ ATMEL_BASE_SPI0 + AT91_SPI_PTCR);
pDesc->state = IDLE;
if (timeout >= CONFIG_SYS_SPI_WRITE_TOUT) {
diff --git a/drivers/spi/atmel_spi.c b/drivers/spi/atmel_spi.c
index d0de931..33e38b6 100644
--- a/drivers/spi/atmel_spi.c
+++ b/drivers/spi/atmel_spi.c
@@ -26,7 +26,7 @@
#include <asm/io.h>
#include <asm/arch/clk.h>
-#include <asm/arch/memory-map.h>
+#include <asm/arch/hardware.h>
#include "atmel_spi.h"
@@ -48,21 +48,21 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
switch (bus) {
case 0:
- regs = (void *)SPI0_BASE;
+ regs = (void *)ATMEL_BASE_SPI0;
break;
-#ifdef SPI1_BASE
+#ifdef ATMEL_BASE_SPI1
case 1:
- regs = (void *)SPI1_BASE;
+ regs = (void *)ATMEL_BASE_SPI1;
break;
#endif
-#ifdef SPI2_BASE
+#ifdef ATMEL_BASE_SPI2
case 2:
- regs = (void *)SPI2_BASE;
+ regs = (void *)ATMEL_BASE_SPI2;
break;
#endif
-#ifdef SPI3_BASE
+#ifdef ATMEL_BASE_SPI3
case 3:
- regs = (void *)SPI3_BASE;
+ regs = (void *)ATMEL_BASE_SPI3;
break;
#endif
default:
diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c
index 64fde68..9532dd9 100644
--- a/drivers/usb/host/ohci-at91.c
+++ b/drivers/usb/host/ohci-at91.c
@@ -25,14 +25,14 @@
#if defined(CONFIG_USB_OHCI_NEW) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT)
+#include <asm/io.h>
#include <asm/arch/hardware.h>
-#include <asm/arch/io.h>
#include <asm/arch/at91_pmc.h>
#include <asm/arch/clk.h>
int usb_cpu_init(void)
{
- at91_pmc_t *pmc = (at91_pmc_t *)AT91_PMC_BASE;
+ at91_pmc_t *pmc = (at91_pmc_t *)ATMEL_BASE_PMC;
#if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \
defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20) || \
@@ -53,11 +53,11 @@ int usb_cpu_init(void)
#endif
/* Enable USB host clock. */
- writel(1 << AT91_ID_UHP, &pmc->pcer);
+ writel(1 << ATMEL_ID_UHP, &pmc->pcer);
#ifdef CONFIG_AT91SAM9261
- writel(AT91_PMC_UHP | AT91_PMC_HCK0, &pmc->scer);
+ writel(ATMEL_PMC_UHP | AT91_PMC_HCK0, &pmc->scer);
#else
- writel(AT91_PMC_UHP, &pmc->scer);
+ writel(ATMEL_PMC_UHP, &pmc->scer);
#endif
return 0;
@@ -65,14 +65,14 @@ int usb_cpu_init(void)
int usb_cpu_stop(void)
{
- at91_pmc_t *pmc = (at91_pmc_t *)AT91_PMC_BASE;
+ at91_pmc_t *pmc = (at91_pmc_t *)ATMEL_BASE_PMC;
/* Disable USB host clock. */
- writel(1 << AT91_ID_UHP, &pmc->pcdr);
+ writel(1 << ATMEL_ID_UHP, &pmc->pcdr);
#ifdef CONFIG_AT91SAM9261
- writel(AT91_PMC_UHP | AT91_PMC_HCK0, &pmc->scdr);
+ writel(ATMEL_PMC_UHP | AT91_PMC_HCK0, &pmc->scdr);
#else
- writel(AT91_PMC_UHP, &pmc->scdr);
+ writel(ATMEL_PMC_UHP, &pmc->scdr);
#endif
#if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \
diff --git a/drivers/watchdog/at91sam9_wdt.c b/drivers/watchdog/at91sam9_wdt.c
index 25afae7..80dad07 100644
--- a/drivers/watchdog/at91sam9_wdt.c
+++ b/drivers/watchdog/at91sam9_wdt.c
@@ -21,7 +21,7 @@
#include <common.h>
#include <watchdog.h>
#include <asm/arch/hardware.h>
-#include <asm/arch/io.h>
+#include <asm/io.h>
#include <asm/arch/at91_wdt.h>
/*
@@ -42,7 +42,7 @@
static int at91_wdt_settimeout(unsigned int timeout)
{
unsigned int reg;
- at91_wdt_t *wd = (at91_wdt_t *) AT91_WDT_BASE;
+ at91_wdt_t *wd = (at91_wdt_t *) ATMEL_BASE_WDT;
/* Check if disabled */
if (readl(&wd->mr) & AT91_WDT_MR_WDDIS) {
@@ -69,7 +69,7 @@ static int at91_wdt_settimeout(unsigned int timeout)
void hw_watchdog_reset(void)
{
- at91_wdt_t *wd = (at91_wdt_t *) AT91_WDT_BASE;
+ at91_wdt_t *wd = (at91_wdt_t *) ATMEL_BASE_WDT;
writel(AT91_WDT_CR_WDRSTT | AT91_WDT_CR_KEY, &wd->cr);
}