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| author | David Andrey <david.andrey@netmodule.com> | 2013-04-05 17:24:24 +0200 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2013-04-30 11:39:24 +0200 |
| commit | 01fbf31042e1eba1fcca3e84f70db7de0d176fe4 (patch) | |
| tree | 5cb69417f2c7f6e8fa3795df259e69d7310d3fcb /drivers | |
| parent | 117cd4cc103443b442afc4d48c8d3920f6c171c0 (diff) | |
| download | u-boot-imx-01fbf31042e1eba1fcca3e84f70db7de0d176fe4.zip u-boot-imx-01fbf31042e1eba1fcca3e84f70db7de0d176fe4.tar.gz u-boot-imx-01fbf31042e1eba1fcca3e84f70db7de0d176fe4.tar.bz2 | |
net: gem: Preserve clk on emio interface
Avoid overwriting GEMx_RCLK_CTRL and GEMx_CLK_CTRL
if the Ethernet interface is connect on EMIO
Do not enable emio for this standard board configuration for now.
Signed-off-by: David Andrey <david.andrey@netmodule.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@ti.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/net/zynq_gem.c | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index 316816d..8e0e01c 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -33,6 +33,7 @@ #include <phy.h> #include <miiphy.h> #include <watchdog.h> +#include <asm/arch/hardware.h> #include <asm/arch/sys_proto.h> #if !defined(CONFIG_PHYLIB) @@ -136,6 +137,7 @@ struct zynq_gem_priv { u32 rxbd_current; u32 rx_first_buf; int phyaddr; + u32 emio; int init; struct phy_device *phydev; struct mii_dev *bus; @@ -317,8 +319,11 @@ static int zynq_gem_init(struct eth_device *dev, bd_t * bis) clk = (5 << 20) | (8 << 8) | (0 << 4) | (1 << 0); break; } - /* FIXME maybe better to define gem address in hardware.h */ - zynq_slcr_gem_clk_setup(dev->iobase != 0xE000B000, rclk, clk); + + /* Change the rclk and clk only not using EMIO interface */ + if (!priv->emio) + zynq_slcr_gem_clk_setup(dev->iobase != + ZYNQ_GEM_BASEADDR0, rclk, clk); setbits_le32(®s->nwctrl, ZYNQ_GEM_NWCTRL_RXEN_MASK | ZYNQ_GEM_NWCTRL_TXEN_MASK); @@ -427,7 +432,7 @@ static int zynq_gem_miiphy_write(const char *devname, uchar addr, return phywrite(dev, addr, reg, val); } -int zynq_gem_initialize(bd_t *bis, int base_addr, int phy_addr) +int zynq_gem_initialize(bd_t *bis, int base_addr, int phy_addr, u32 emio) { struct eth_device *dev; struct zynq_gem_priv *priv; @@ -444,6 +449,7 @@ int zynq_gem_initialize(bd_t *bis, int base_addr, int phy_addr) priv = dev->priv; priv->phyaddr = phy_addr; + priv->emio = emio; sprintf(dev->name, "Gem.%x", base_addr); |