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| author | Tom Rini <trini@ti.com> | 2012-08-08 14:35:55 -0700 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2012-09-01 14:58:19 +0200 |
| commit | a4a99fffd8a006d99958e5bcded36d7e7218bd36 (patch) | |
| tree | 66c7a842c1a7890688cd0d7b04fc503f106efb33 /drivers | |
| parent | 4c0620bf42172325ea0c6afa0fdd362bb264e31b (diff) | |
| download | u-boot-imx-a4a99fffd8a006d99958e5bcded36d7e7218bd36.zip u-boot-imx-a4a99fffd8a006d99958e5bcded36d7e7218bd36.tar.gz u-boot-imx-a4a99fffd8a006d99958e5bcded36d7e7218bd36.tar.bz2 | |
am335x evm: Enable support for spi0
Signed-off-by: Tom Rini <trini@ti.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/spi/omap3_spi.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/spi/omap3_spi.c b/drivers/spi/omap3_spi.c index 47f9e56..e40a632 100644 --- a/drivers/spi/omap3_spi.c +++ b/drivers/spi/omap3_spi.c @@ -173,8 +173,18 @@ int spi_claim_bus(struct spi_slave *slave) /* standard 4-wire master mode: SCK, MOSI/out, MISO/in, nCS * REVISIT: this controller could support SPI_3WIRE mode. */ +#ifdef CONFIG_AM33XX + /* + * The reference design on AM33xx has D0 and D1 wired up opposite + * of how it has been done on previous platforms. We assume that + * custom hardware will also follow this convention. + */ + conf &= OMAP3_MCSPI_CHCONF_DPE0; + conf |= ~(OMAP3_MCSPI_CHCONF_IS|OMAP3_MCSPI_CHCONF_DPE1); +#else conf &= ~(OMAP3_MCSPI_CHCONF_IS|OMAP3_MCSPI_CHCONF_DPE1); conf |= OMAP3_MCSPI_CHCONF_DPE0; +#endif /* wordlength */ conf &= ~OMAP3_MCSPI_CHCONF_WL_MASK; |