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| author | Liu Ying <Ying.Liu@freescale.com> | 2013-06-07 09:05:59 +0800 |
|---|---|---|
| committer | Liu Ying <Ying.Liu@freescale.com> | 2013-06-17 08:41:17 +0800 |
| commit | 56f7baefe24f20c9e7b134bd8c904d08ee9e7a70 (patch) | |
| tree | 4c641aecefa0e3ad08ac597e8f4de67a3a5cbab4 /drivers | |
| parent | 613bf07455a67bd0f6bea608888ed825dc0e686b (diff) | |
| download | u-boot-imx-56f7baefe24f20c9e7b134bd8c904d08ee9e7a70.zip u-boot-imx-56f7baefe24f20c9e7b134bd8c904d08ee9e7a70.tar.gz u-boot-imx-56f7baefe24f20c9e7b134bd8c904d08ee9e7a70.tar.bz2 | |
ENGR00267118-1 IPU disp:Align setting with kernel
To align with kernel display setting so that we may
avoid a blank interval during smooth UI transition
from uboot to Android desktop on LVDS0(LVDS1 is OK).
The code change refers to the following CR:
"ENGR00127358 ipuv3: make display data signal negative
during blanking period"
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/video/ipu_disp.c | 54 | ||||
| -rw-r--r-- | drivers/video/ipu_regs.h | 3 |
2 files changed, 35 insertions, 22 deletions
diff --git a/drivers/video/ipu_disp.c b/drivers/video/ipu_disp.c index 8f9c583..b9281ff 100644 --- a/drivers/video/ipu_disp.c +++ b/drivers/video/ipu_disp.c @@ -6,7 +6,7 @@ * * Linux IPU driver * - * (C) Copyright 2005-2011 Freescale Semiconductor, Inc. + * (C) Copyright 2005-2013 Freescale Semiconductor, Inc. * * See file CREDITS for list of people who contributed to this * project. @@ -272,22 +272,34 @@ static void ipu_dc_map_clear(int map) } static void ipu_dc_write_tmpl(int word, u32 opcode, u32 operand, int map, - int wave, int glue, int sync) + int wave, int glue, int sync, int stop) { u32 reg; - int stop = 1; - - reg = sync; - reg |= (glue << 4); - reg |= (++wave << 11); - reg |= (++map << 15); - reg |= (operand << 20) & 0xFFF00000; - __raw_writel(reg, ipu_dc_tmpl_reg + word * 2); - - reg = (operand >> 12); - reg |= opcode << 4; - reg |= (stop << 9); - __raw_writel(reg, ipu_dc_tmpl_reg + word * 2 + 1); + + if (opcode == WRG) { + reg = sync; + reg |= (glue << 4); + reg |= (++wave << 11); + reg |= ((operand & 0x1FFFF) << 15); + __raw_writel(reg, ipu_dc_tmpl_reg + word * 2); + + reg = (operand >> 17); + reg |= opcode << 7; + reg |= (stop << 9); + __raw_writel(reg, ipu_dc_tmpl_reg + word * 2 + 1); + } else { + reg = sync; + reg |= (glue << 4); + reg |= (++wave << 11); + reg |= (++map << 15); + reg |= (operand << 20) & 0xFFF00000; + __raw_writel(reg, ipu_dc_tmpl_reg + word * 2); + + reg = (operand >> 12); + reg |= opcode << 4; + reg |= (stop << 9); + __raw_writel(reg, ipu_dc_tmpl_reg + word * 2 + 1); + } } static void ipu_dc_link_event(int chan, int event, int addr, int priority) @@ -1195,13 +1207,13 @@ int32_t ipu_init_sync_panel(int disp, uint32_t pixel_clk, /* Init template microcode */ if (disp) { - ipu_dc_write_tmpl(2, WROD(0), 0, map, SYNC_WAVE, 8, 5); - ipu_dc_write_tmpl(3, WROD(0), 0, map, SYNC_WAVE, 4, 5); - ipu_dc_write_tmpl(4, WROD(0), 0, map, SYNC_WAVE, 0, 5); + ipu_dc_write_tmpl(2, WROD(0), 0, map, SYNC_WAVE, 8, 5, 1); + ipu_dc_write_tmpl(3, WROD(0), 0, map, SYNC_WAVE, 4, 5, 1); + ipu_dc_write_tmpl(4, WROD(0), 0, map, SYNC_WAVE, 0, 5, 1); } else { - ipu_dc_write_tmpl(5, WROD(0), 0, map, SYNC_WAVE, 8, 5); - ipu_dc_write_tmpl(6, WROD(0), 0, map, SYNC_WAVE, 4, 5); - ipu_dc_write_tmpl(7, WROD(0), 0, map, SYNC_WAVE, 0, 5); + ipu_dc_write_tmpl(5, WROD(0), 0, map, SYNC_WAVE, 8, 5, 1); + ipu_dc_write_tmpl(6, WROD(0), 0, map, SYNC_WAVE, 4, 5, 1); + ipu_dc_write_tmpl(7, WROD(0), 0, map, SYNC_WAVE, 0, 5, 1); } if (sig.Hsync_pol) diff --git a/drivers/video/ipu_regs.h b/drivers/video/ipu_regs.h index a60c2b8..4836a41 100644 --- a/drivers/video/ipu_regs.h +++ b/drivers/video/ipu_regs.h @@ -6,7 +6,7 @@ * * Linux IPU driver: * - * (C) Copyright 2005-2011 Freescale Semiconductor, Inc. + * (C) Copyright 2005-2013 Freescale Semiconductor, Inc. * * See file CREDITS for list of people who contributed to this * project. @@ -445,5 +445,6 @@ static inline struct ipu_dc_ch *dc_ch_offset(int ch) /* DC template opcodes */ #define WROD(lf) (0x18 | (lf << 1)) +#define WRG (0x01) #endif |