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authorAlan Carvalho de Assis <alan.assis@freescale.com>2009-03-05 09:23:43 -0300
committerFred Fan <r01011@freescale.com>2009-09-10 14:50:22 +0800
commit703ba8b936a75d8d66eb8cef6fe0c17b7ac6af27 (patch)
tree6965fcaea69bb0c278859312d98314b3580f4d04 /drivers
parenta7a74cdb675607022692b15459dbfeb2cb1b5903 (diff)
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ENGR00108673 Add i.MX25 core to U-Boot
This patch add support on U-Boot to i.MX25 processor. Signed-off-by: Alan Carvalho de Assis <alan.assis@freescale.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/i2c/mxc_i2c.c5
-rw-r--r--drivers/mtd/nand/Makefile1
-rw-r--r--drivers/net/mxc_fec.c40
3 files changed, 45 insertions, 1 deletions
diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index 530b332..3c13efe 100644
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -28,7 +28,10 @@
#if defined(CONFIG_HARD_I2C)
-#ifdef CONFIG_MX31
+#ifdef CONFIG_MX25
+#include <asm/arch/mx25.h>
+#include <asm/arch/mx25-regs.h>
+#elif defined(CONFIG_MX31)
#include <asm/arch/mx31.h>
#include <asm/arch/mx31-regs.h>
#elif defined(CONFIG_MX35)
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index a1a7579..29f316b 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -46,6 +46,7 @@ COBJS-$(CONFIG_NAND_S3C2410) += s3c2410_nand.o
COBJS-$(CONFIG_NAND_S3C64XX) += s3c64xx.o
COBJS-$(CONFIG_NAND_OMAP_GPMC) += omap_gpmc.o
COBJS-$(CONFIG_NAND_PLAT) += nand_plat.o
+COBJS-$(CONFIG_MX25) += mxc_nand.o
COBJS-$(CONFIG_MX31_NAND) += mx31_nand.o
COBJS-$(CONFIG_MX35) += mxc_nand.o
COBJS-$(CONFIG_MX51) += mxc_nand.o
diff --git a/drivers/net/mxc_fec.c b/drivers/net/mxc_fec.c
index 676f89f..218c432 100644
--- a/drivers/net/mxc_fec.c
+++ b/drivers/net/mxc_fec.c
@@ -88,6 +88,44 @@
DECLARE_GLOBAL_DATA_PTR;
+#ifdef CONFIG_MX25
+/*
+ * * i.MX25 allows RMII mode to be configured via a gasket
+ * */
+#define FEC_MIIGSK_CFGR_FRCONT (1 << 6)
+#define FEC_MIIGSK_CFGR_LBMODE (1 << 4)
+#define FEC_MIIGSK_CFGR_EMODE (1 << 3)
+#define FEC_MIIGSK_CFGR_IF_MODE_MASK (3 << 0)
+#define FEC_MIIGSK_CFGR_IF_MODE_MII (0 << 0)
+#define FEC_MIIGSK_CFGR_IF_MODE_RMII (1 << 0)
+
+#define FEC_MIIGSK_ENR_READY (1 << 2)
+#define FEC_MIIGSK_ENR_EN (1 << 1)
+
+static inline void fec_localhw_setup(volatile fec_t *fecp)
+{
+ /*
+ * Set up the MII gasket for RMII mode
+ */
+ printf("FEC: enable RMII gasket\n");
+
+ /* disable the gasket and wait */
+ fecp->fec_miigsk_enr = 0;
+ while (fecp->fec_miigsk_enr & FEC_MIIGSK_ENR_READY)
+ udelay(1);
+
+ /* configure the gasket for RMII, 50 MHz, no loopback, no echo */
+ fecp->fec_miigsk_cfgr = FEC_MIIGSK_CFGR_IF_MODE_RMII;
+
+ /* re-enable the gasket */
+ fecp->fec_miigsk_enr = FEC_MIIGSK_ENR_EN;
+}
+#else
+static inline void fec_localhw_setup(struct fec_t *fecp)
+{
+}
+#endif
+
#if defined(CONFIG_CMD_NET) && defined(CONFIG_NET_MULTI)
struct fec_info_s fec_info[] = {
@@ -574,6 +612,8 @@ int fec_init(struct eth_device *dev, bd_t *bd)
fec_reset(dev);
+ fec_localhw_setup(fecp);
+
#if defined (CONFIG_CMD_MII) || defined (CONFIG_MII) || \
defined (CONFIG_DISCOVER_PHY)