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authorMagnus Lilja <lilja.magnus@gmail.com>2009-11-11 20:18:43 +0100
committerScott Wood <scottwood@freescale.com>2010-01-19 17:08:13 -0600
commitf6a9748e3261fdccdeb78a2b58e6ad538ba54496 (patch)
tree6fdc59c2520a6184806c20c3767749104901ee86 /drivers
parentc816dcb118e26ba17e7d73989514fec08a3823ac (diff)
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mxc_nand: Update driver to work with i.MX31.
Tested on i.MX31 Litekit. Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/mtd/nand/mxc_nand.c34
1 files changed, 31 insertions, 3 deletions
diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c
index eb0323f..fc111b5 100644
--- a/drivers/mtd/nand/mxc_nand.c
+++ b/drivers/mtd/nand/mxc_nand.c
@@ -149,6 +149,36 @@ static struct nand_ecclayout nand_soft_eccoob = {
};
#endif
+#ifdef CONFIG_MX27
+static int is_16bit_nand(void)
+{
+ struct system_control_regs *sc_regs =
+ (struct system_control_regs *)IMX_SYSTEM_CTL_BASE;
+
+ if (readl(&sc_regs->fmcr) & NF_16BIT_SEL)
+ return 1;
+ else
+ return 0;
+}
+#elif defined(CONFIG_MX31)
+static int is_16bit_nand(void)
+{
+ struct clock_control_regs *sc_regs =
+ (struct clock_control_regs *)CCM_BASE;
+
+ if (readl(&sc_regs->rcsr) & CCM_RCSR_NF16B)
+ return 1;
+ else
+ return 0;
+}
+#else
+#warning "8/16 bit NAND autodetection not supported"
+static int is_16bit_nand(void)
+{
+ return 0;
+}
+#endif
+
static uint32_t *mxc_nand_memcpy32(uint32_t *dest, uint32_t *source, size_t size)
{
uint32_t *d = dest;
@@ -808,8 +838,6 @@ static void mxc_nand_command(struct mtd_info *mtd, unsigned command,
int board_nand_init(struct nand_chip *this)
{
- struct system_control_regs *sc_regs =
- (struct system_control_regs *)IMX_SYSTEM_CTL_BASE;
struct mtd_info *mtd;
uint16_t tmp;
int err = 0;
@@ -871,7 +899,7 @@ int board_nand_init(struct nand_chip *this)
writew(0x4, &host->regs->nfc_wrprot);
/* NAND bus width determines access funtions used by upper layer */
- if (readl(&sc_regs->fmcr) & NF_16BIT_SEL)
+ if (is_16bit_nand())
this->options |= NAND_BUSWIDTH_16;
host->pagesize_2k = 0;