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authorJaehoon Chung <jh80.chung@samsung.com>2014-05-16 13:59:57 +0900
committerMinkyu Kang <mk7.kang@samsung.com>2014-05-16 14:54:26 +0900
commite09bd85329186015ec1bc663c0d55dd6bec41d2a (patch)
tree2a24f486595c085b9e8324197b63a6612d49bcc7 /drivers
parentea5ee2d7fb56632968f46814b19f56a64ea88add (diff)
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mmc: exynos_dw_mmc: enable the DDR mode
Set the ddr mode capability by default. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/mmc/exynos_dw_mmc.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c
index 28941ad..d96dfe1 100644
--- a/drivers/mmc/exynos_dw_mmc.c
+++ b/drivers/mmc/exynos_dw_mmc.c
@@ -95,6 +95,7 @@ static int exynos_dwmci_core_init(struct dwmci_host *host, int index)
host->clksel_val = DWMMC_MMC2_CLKSEL_VAL;
}
+ host->caps = MMC_MODE_DDR_52MHz;
host->clksel = exynos_dwmci_clksel;
host->dev_index = index;
host->get_mmc_clk = exynos_dwmci_get_clk;