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authorMarkus Niebel <Markus.Niebel@tq-group.com>2014-10-23 16:09:38 +0200
committerJagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>2014-10-27 22:37:03 +0530
commitba3451d3d8990fec10c1addc689448bd5b81dc62 (patch)
treec57865babbe88c52ee0825d60b509f45f6f15e2a /drivers
parentcdcdad851f7abc4e3328bae3f675349f3f5cda4a (diff)
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SPI: mxc_spi: remove second reset from ECSPI config handler
the second reset prevents other registers to be written. This will prevent to have the correct signal levels for SCLK before writing to the config reg in spi_xchg_single. Tested with GPIO based chipselect and SPI_MODE_3 on i.MX6S Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com> Acked-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/spi/mxc_spi.c3
1 files changed, 0 insertions, 3 deletions
diff --git a/drivers/spi/mxc_spi.c b/drivers/spi/mxc_spi.c
index be10269..523c7af 100644
--- a/drivers/spi/mxc_spi.c
+++ b/drivers/spi/mxc_spi.c
@@ -169,9 +169,6 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs,
reg_ctrl = (reg_ctrl & ~MXC_CSPICTRL_POSTDIV(0x0F)) |
MXC_CSPICTRL_POSTDIV(post_div);
- /* We need to disable SPI before changing registers */
- reg_ctrl &= ~MXC_CSPICTRL_EN;
-
if (mode & SPI_CS_HIGH)
ss_pol = 1;