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author | Stefan Agner <stefan@agner.ch> | 2015-12-09 11:21:25 -0800 |
---|---|---|
committer | Joe Hershberger <joe.hershberger@ni.com> | 2016-01-28 12:22:00 -0600 |
commit | a058052c358c3ecf5f394ff37def6a45eb26768c (patch) | |
tree | 84f7ba0446f0a1a491c8181d43100ee894cb793a /drivers | |
parent | 077678eb0c226e52a1f90edabd3369ab26065b32 (diff) | |
download | u-boot-imx-a058052c358c3ecf5f394ff37def6a45eb26768c.zip u-boot-imx-a058052c358c3ecf5f394ff37def6a45eb26768c.tar.gz u-boot-imx-a058052c358c3ecf5f394ff37def6a45eb26768c.tar.bz2 |
net: phy: do not read configuration register on reset
When doing a software reset, the reset flag should be written without
other bits set. Writing the current state will lead to restoring the
state of the PHY (e.g. Powerdown), which is not what is expected from
a software reset.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Acked-by: Michael Welling <mwelling@ieee.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/net/phy/phy.c | 11 |
1 files changed, 2 insertions, 9 deletions
diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c index 51b5746..ef9f13b 100644 --- a/drivers/net/phy/phy.c +++ b/drivers/net/phy/phy.c @@ -717,15 +717,7 @@ int phy_reset(struct phy_device *phydev) } #endif - reg = phy_read(phydev, devad, MII_BMCR); - if (reg < 0) { - debug("PHY status read failed\n"); - return -1; - } - - reg |= BMCR_RESET; - - if (phy_write(phydev, devad, MII_BMCR, reg) < 0) { + if (phy_write(phydev, devad, MII_BMCR, BMCR_RESET) < 0) { debug("PHY reset failed\n"); return -1; } @@ -738,6 +730,7 @@ int phy_reset(struct phy_device *phydev) * auto-clearing). This should happen within 0.5 seconds per the * IEEE spec. */ + reg = phy_read(phydev, devad, MII_BMCR); while ((reg & BMCR_RESET) && timeout--) { reg = phy_read(phydev, devad, MII_BMCR); |