Merge git://git.denx.de/u-boot-mpc85xx

8 files changed, 31 insertions, 32 deletions

diff --git a/drivers/crypto/fsl/jr.c b/drivers/crypto/fsl/jr.c
index 4a8cc32..1b88229 100644
--- a/drivers/crypto/fsl/jr.c
+++ b/drivers/crypto/fsl/jr.c
@@ -21,7 +21,7 @@
 
 uint32_t sec_offset[CONFIG_SYS_FSL_MAX_NUM_OF_SEC] = {
 	0,
-#if defined(CONFIG_PPC_C29X)
+#if defined(CONFIG_ARCH_C29X)
 	CONFIG_SYS_FSL_SEC_IDX_OFFSET,
 	2 * CONFIG_SYS_FSL_SEC_IDX_OFFSET
 #endif
diff --git a/drivers/ddr/fsl/ctrl_regs.c b/drivers/ddr/fsl/ctrl_regs.c
index 24fd366..32b0967 100644
--- a/drivers/ddr/fsl/ctrl_regs.c
+++ b/drivers/ddr/fsl/ctrl_regs.c
@@ -1831,7 +1831,7 @@ static void set_ddr_sdram_clk_cntl(fsl_ddr_cfg_regs_t *ddr,
 	unsigned int clk_adjust;	/* Clock adjust */
 	unsigned int ss_en = 0;		/* Source synchronous enable */
 
-#if defined(CONFIG_MPC8541) || defined(CONFIG_MPC8555)
+#if defined(CONFIG_ARCH_MPC8541) || defined(CONFIG_ARCH_MPC8555)
 	/* Per FSL Application Note: AN2805 */
 	ss_en = 1;
 #endif
diff --git a/drivers/ddr/fsl/mpc85xx_ddr_gen1.c b/drivers/ddr/fsl/mpc85xx_ddr_gen1.c
index c27288d..c005f52 100644
--- a/drivers/ddr/fsl/mpc85xx_ddr_gen1.c
+++ b/drivers/ddr/fsl/mpc85xx_ddr_gen1.c
@@ -47,7 +47,7 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,
 	out_be32(&ddr->timing_cfg_2, regs->timing_cfg_2);
 	out_be32(&ddr->sdram_mode, regs->ddr_sdram_mode);
 	out_be32(&ddr->sdram_interval, regs->ddr_sdram_interval);
-#if defined(CONFIG_MPC8555) || defined(CONFIG_MPC8541)
+#if defined(CONFIG_ARCH_MPC8555) || defined(CONFIG_ARCH_MPC8541)
 	out_be32(&ddr->sdram_clk_cntl, regs->ddr_sdram_clk_cntl);
 #endif
 
diff --git a/drivers/input/keyboard.c b/drivers/input/keyboard.c
index 48255bd..7af5868 100644
--- a/drivers/input/keyboard.c
+++ b/drivers/input/keyboard.c
@@ -20,8 +20,8 @@ static struct input_config config;
 
 static int kbd_read_keys(struct input_config *config)
 {
-#if defined(CONFIG_MPC5xxx) || defined(CONFIG_MPC8540) || \
-		defined(CONFIG_MPC8541) || defined(CONFIG_MPC8555)
+#if defined(CONFIG_MPC5xxx) || defined(CONFIG_ARCH_MPC8540) || \
+		defined(CONFIG_ARCH_MPC8541) || defined(CONFIG_ARCH_MPC8555)
 	/* no ISR is used, so received chars must be polled */
 	ps2ser_check();
 #endif
diff --git a/drivers/net/fm/Makefile b/drivers/net/fm/Makefile
index 316fef4..08b3f27 100644
--- a/drivers/net/fm/Makefile
+++ b/drivers/net/fm/Makefile
@@ -17,26 +17,24 @@ obj-$(CONFIG_SYS_FMAN_V3) += memac_phy.o
 obj-$(CONFIG_SYS_FMAN_V3) += memac.o
 
 # SoC specific SERDES support
-obj-$(CONFIG_P1017)	+= p1023.o
-obj-$(CONFIG_P1023)	+= p1023.o
+obj-$(CONFIG_ARCH_P1023)	+= p1023.o
 # The P204x, P304x, and P5020 are the same
-obj-$(CONFIG_PPC_P2041) += p5020.o
-obj-$(CONFIG_PPC_P3041) += p5020.o
-obj-$(CONFIG_PPC_P4080) += p4080.o
-obj-$(CONFIG_PPC_P5020) += p5020.o
-obj-$(CONFIG_PPC_P5040) += p5040.o
-obj-$(CONFIG_PPC_T1040) += t1040.o
-obj-$(CONFIG_PPC_T1042)	+= t1040.o
+obj-$(CONFIG_ARCH_P2041) += p5020.o
+obj-$(CONFIG_ARCH_P3041) += p5020.o
+obj-$(CONFIG_ARCH_P4080) += p4080.o
+obj-$(CONFIG_ARCH_P5020) += p5020.o
+obj-$(CONFIG_ARCH_P5040) += p5040.o
+obj-$(CONFIG_ARCH_T1040) += t1040.o
+obj-$(CONFIG_ARCH_T1042)	+= t1040.o
 obj-$(CONFIG_PPC_T1020)	+= t1040.o
 obj-$(CONFIG_PPC_T1022)	+= t1040.o
-obj-$(CONFIG_PPC_T1023) += t1024.o
-obj-$(CONFIG_PPC_T1024) += t1024.o
-obj-$(CONFIG_PPC_T2080) += t2080.o
-obj-$(CONFIG_PPC_T2081) += t2080.o
-obj-$(CONFIG_PPC_T4240) += t4240.o
-obj-$(CONFIG_PPC_T4160) += t4240.o
-obj-$(CONFIG_PPC_T4080) += t4240.o
-obj-$(CONFIG_PPC_B4420) += b4860.o
-obj-$(CONFIG_PPC_B4860) += b4860.o
+obj-$(CONFIG_ARCH_T1023) += t1024.o
+obj-$(CONFIG_ARCH_T1024) += t1024.o
+obj-$(CONFIG_ARCH_T2080) += t2080.o
+obj-$(CONFIG_ARCH_T2081) += t2080.o
+obj-$(CONFIG_ARCH_T4240) += t4240.o
+obj-$(CONFIG_ARCH_T4160) += t4240.o
+obj-$(CONFIG_ARCH_B4420) += b4860.o
+obj-$(CONFIG_ARCH_B4860) += b4860.o
 obj-$(CONFIG_LS1043A)	+= ls1043.o
 obj-$(CONFIG_ARCH_LS1046A)	+= ls1046.o
diff --git a/drivers/net/fm/b4860.c b/drivers/net/fm/b4860.c
index eb058c9..5aeeb87 100644
--- a/drivers/net/fm/b4860.c
+++ b/drivers/net/fm/b4860.c
@@ -47,7 +47,7 @@ void fman_enable_port(enum fm_port port)
 
 phy_interface_t fman_port_enet_if(enum fm_port port)
 {
-#if defined(CONFIG_B4860QDS)
+#if defined(CONFIG_TARGET_B4860QDS) || defined(CONFIG_TARGET_B4420QDS)
 	u32 serdes2_prtcl;
 	char buffer[HWCONFIG_BUFFER_SIZE];
 	char *buf = NULL;
@@ -60,7 +60,8 @@ phy_interface_t fman_port_enet_if(enum fm_port port)
 	/*B4860 has two 10Gig Mac*/
 	if ((port == FM1_10GEC1 || port == FM1_10GEC2)	&&
 	    ((is_serdes_configured(XAUI_FM1_MAC9))	||
-	     #if !defined(CONFIG_B4860QDS)
+	     #if (!defined(CONFIG_TARGET_B4860QDS) && \
+		  !defined(CONFIG_TARGET_B4R420QDS))
 	     (is_serdes_configured(XFI_FM1_MAC9))	||
 	     (is_serdes_configured(XFI_FM1_MAC10))	||
 	     #endif
@@ -68,7 +69,7 @@ phy_interface_t fman_port_enet_if(enum fm_port port)
 	     ))
 		return PHY_INTERFACE_MODE_XGMII;
 
-#if defined(CONFIG_B4860QDS)
+#if defined(CONFIG_TARGET_B4860QDS) || defined(CONFIG_TARGET_B4420QDS)
 	serdes2_prtcl = in_be32(&gur->rcwsr[4]) &
 			FSL_CORENET2_RCWSR4_SRDS2_PRTCL;
 
diff --git a/drivers/net/fm/fm.h b/drivers/net/fm/fm.h
index fa9bc9f..64cc971 100644
--- a/drivers/net/fm/fm.h
+++ b/drivers/net/fm/fm.h
@@ -88,7 +88,7 @@ struct fm_port_global_pram {
 #define PRAM_MODE_GLOBAL	0x20000000
 #define PRAM_MODE_GRACEFUL_STOP	0x00800000
 
-#if defined(CONFIG_P1017) || defined(CONFIG_P1023)
+#if defined(CONFIG_ARCH_P1023)
 #define FM_FREE_POOL_SIZE	0x2000 /* 8K bytes */
 #else
 #define FM_FREE_POOL_SIZE	0x20000 /* 128K bytes */
diff --git a/drivers/qe/uec.c b/drivers/qe/uec.c
index 5fd956a..b3af707 100644
--- a/drivers/qe/uec.c
+++ b/drivers/qe/uec.c
@@ -567,7 +567,7 @@ static void phy_change(struct eth_device *dev)
 {
 	uec_private_t	*uec = (uec_private_t *)dev->priv;
 
-#if defined(CONFIG_P1012) || defined(CONFIG_P1021) || defined(CONFIG_P1025)
+#if defined(CONFIG_ARCH_P1021) || defined(CONFIG_ARCH_P1025)
 	ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
 
 	/* QE9 and QE12 need to be set for enabling QE MII managment signals */
@@ -578,7 +578,7 @@ static void phy_change(struct eth_device *dev)
 	/* Update the link, speed, duplex */
 	uec->mii_info->phyinfo->read_status(uec->mii_info);
 
-#if defined(CONFIG_P1012) || defined(CONFIG_P1021) || defined(CONFIG_P1025)
+#if defined(CONFIG_ARCH_P1021) || defined(CONFIG_ARCH_P1025)
 	/*
 	 * QE12 is muxed with LBCTL, it needs to be released for enabling
 	 * LBCTL signal for LBC usage.
@@ -1193,14 +1193,14 @@ static int uec_init(struct eth_device* dev, bd_t *bd)
 	uec_private_t		*uec;
 	int			err, i;
 	struct phy_info         *curphy;
-#if defined(CONFIG_P1012) || defined(CONFIG_P1021) || defined(CONFIG_P1025)
+#if defined(CONFIG_ARCH_P1021) || defined(CONFIG_ARCH_P1025)
 	ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
 #endif
 
 	uec = (uec_private_t *)dev->priv;
 
 	if (uec->the_first_run == 0) {
-#if defined(CONFIG_P1012) || defined(CONFIG_P1021) || defined(CONFIG_P1025)
+#if defined(CONFIG_ARCH_P1021) || defined(CONFIG_ARCH_P1025)
 	/* QE9 and QE12 need to be set for enabling QE MII managment signals */
 	setbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_QE9);
 	setbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_QE12);
@@ -1232,7 +1232,7 @@ static int uec_init(struct eth_device* dev, bd_t *bd)
 			udelay(100000);
 		} while (1);
 
-#if defined(CONFIG_P1012) || defined(CONFIG_P1021) || defined(CONFIG_P1025)
+#if defined(CONFIG_ARCH_P1021) || defined(CONFIG_ARCH_P1025)
 		/* QE12 needs to be released for enabling LBCTL signal*/
 		clrbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_QE12);
 #endif