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authorMasahiro Yamada <yamada.m@jp.panasonic.com>2014-10-03 20:03:03 +0900
committerScott Wood <scottwood@freescale.com>2014-10-09 17:33:24 -0500
commit05968e7cfd5dcc50cfe51d03d119a5e9d77bd07c (patch)
tree3e3b85095f496c7e2edb972316dfd377b29d88cd /drivers
parentdd0204e48d05f41480743a798b94d5484b664639 (diff)
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mtd: denali: fix NAND_CMD_PARAM command
NAND_CMD_PARAM (0xEC) command is not working on the Denali NAND controller driver. Unlike NAND_CMD_READID (0x90), when the NAND_CMD_PARAM command is followed by an address cycle, the target device goes busy. (R/B# is deasserted) Wait until the parameter data are ready. In addition, unnecessary clear_interrupts() should be removed. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Chin Liang See <clsee@altera.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/mtd/nand/denali.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c
index ba3de1a..d9abc7e 100644
--- a/drivers/mtd/nand/denali.c
+++ b/drivers/mtd/nand/denali.c
@@ -1059,9 +1059,8 @@ static void denali_cmdfunc(struct mtd_info *mtd, unsigned int cmd, int col,
addr = MODE_11 | BANK(denali->flash_bank);
index_addr(denali, addr | 0, cmd);
break;
- case NAND_CMD_PARAM:
- clear_interrupts(denali);
case NAND_CMD_READID:
+ case NAND_CMD_PARAM:
reset_buf(denali);
/* sometimes ManufactureId read from register is not right
* e.g. some of Micron MT29F32G08QAA MLC NAND chips
@@ -1070,6 +1069,8 @@ static void denali_cmdfunc(struct mtd_info *mtd, unsigned int cmd, int col,
addr = MODE_11 | BANK(denali->flash_bank);
index_addr(denali, addr | 0, cmd);
index_addr(denali, addr | 1, col & 0xFF);
+ if (cmd == NAND_CMD_PARAM)
+ udelay(50);
break;
case NAND_CMD_READ0:
case NAND_CMD_SEQIN: