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authorSimon Glass <sjg@chromium.org>2015-04-20 12:37:23 -0600
committerSimon Glass <sjg@chromium.org>2015-05-05 20:58:39 -0600
commitdbeda5b2255089889788e0dd3478680feec86139 (patch)
treee4640d8cee4a8aaf6c13c23e1bd067a3b981e8fd /drivers
parent94eefdee2f5db36d52e817a01b07c8255527e193 (diff)
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dm: rtc: Add a uclass for real-time clocks
Add a uclass for real-time clocks which support getting the current time, setting it and resetting the chip to a known-working state. Some RTCs have additional registers which can be used to store settings, so also provide an interface to these. Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/rtc/Kconfig8
-rw-r--r--drivers/rtc/Makefile2
-rw-r--r--drivers/rtc/rtc-uclass.c96
3 files changed, 106 insertions, 0 deletions
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index e69de29..bd63621 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -0,0 +1,8 @@
+config DM_RTC
+ bool "Enable Driver Model for RTC drivers"
+ depends on DM
+ help
+ Enable drver model for real-time-clock drivers. The RTC uclass
+ then provides the rtc_get()/rtc_set() interface, delegating to
+ drivers to perform the actual functions. See rtc.h for a
+ description of the API.
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index fdcbc00..61373b6 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -7,6 +7,8 @@
#ccflags-y += -DDEBUG
+obj-$(CONFIG_DM_RTC) += rtc-uclass.o
+
obj-$(CONFIG_RTC_AT91SAM9_RTT) += at91sam9_rtt.o
obj-$(CONFIG_RTC_BFIN) += bfin_rtc.o
obj-y += date.o
diff --git a/drivers/rtc/rtc-uclass.c b/drivers/rtc/rtc-uclass.c
new file mode 100644
index 0000000..fe74c69
--- /dev/null
+++ b/drivers/rtc/rtc-uclass.c
@@ -0,0 +1,96 @@
+/*
+ * (C) Copyright 2015 Google, Inc
+ * Written by Simon Glass <sjg@chromium.org>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <rtc.h>
+
+int dm_rtc_get(struct udevice *dev, struct rtc_time *time)
+{
+ struct rtc_ops *ops = rtc_get_ops(dev);
+
+ assert(ops);
+ if (!ops->get)
+ return -ENOSYS;
+ return ops->get(dev, time);
+}
+
+int dm_rtc_set(struct udevice *dev, struct rtc_time *time)
+{
+ struct rtc_ops *ops = rtc_get_ops(dev);
+
+ assert(ops);
+ if (!ops->set)
+ return -ENOSYS;
+ return ops->set(dev, time);
+}
+
+int dm_rtc_reset(struct udevice *dev)
+{
+ struct rtc_ops *ops = rtc_get_ops(dev);
+
+ assert(ops);
+ if (!ops->reset)
+ return -ENOSYS;
+ return ops->reset(dev);
+}
+
+int rtc_read8(struct udevice *dev, unsigned int reg)
+{
+ struct rtc_ops *ops = rtc_get_ops(dev);
+
+ assert(ops);
+ if (!ops->read8)
+ return -ENOSYS;
+ return ops->read8(dev, reg);
+}
+
+int rtc_write8(struct udevice *dev, unsigned int reg, int val)
+{
+ struct rtc_ops *ops = rtc_get_ops(dev);
+
+ assert(ops);
+ if (!ops->write8)
+ return -ENOSYS;
+ return ops->write8(dev, reg, val);
+}
+
+int rtc_read32(struct udevice *dev, unsigned int reg, u32 *valuep)
+{
+ u32 value = 0;
+ int ret;
+ int i;
+
+ for (i = 0; i < sizeof(value); i++) {
+ ret = rtc_read8(dev, reg + i);
+ if (ret)
+ return ret;
+ value |= ret << (i << 3);
+ }
+
+ *valuep = value;
+ return 0;
+}
+
+int rtc_write32(struct udevice *dev, unsigned int reg, u32 value)
+{
+ int i, ret;
+
+ for (i = 0; i < sizeof(value); i++) {
+ ret = rtc_write8(dev, reg + i, (value >> (i << 3)) & 0xff);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+
+UCLASS_DRIVER(rtc) = {
+ .name = "rtc",
+ .id = UCLASS_RTC,
+};