diff options
| author | Lokesh Vutla <lokeshvutla@ti.com> | 2016-04-13 09:50:59 +0530 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2016-04-18 17:11:43 -0400 |
| commit | 8f69523213a2929fda1fb62fe018684444586c1b (patch) | |
| tree | d5e69ab1ccec48b7efc5e93362a49e03eae7f886 /drivers | |
| parent | 3bfc8152b2c09d81fb00f4d3990e5dfd59682b96 (diff) | |
| download | u-boot-imx-8f69523213a2929fda1fb62fe018684444586c1b.zip u-boot-imx-8f69523213a2929fda1fb62fe018684444586c1b.tar.gz u-boot-imx-8f69523213a2929fda1fb62fe018684444586c1b.tar.bz2 | |
memory: Move TI_AEMIF config to KCONFIG
Not all Keystone2 devices has AEMIF NAND controller. So adding Kconfig
entry for CONFIG_TI_AEMIF and enabling it in respective defconfigs on
platforms with AEMIF controller.
Reported-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/Kconfig | 2 | ||||
| -rw-r--r-- | drivers/memory/Kconfig | 18 |
2 files changed, 20 insertions, 0 deletions
diff --git a/drivers/Kconfig b/drivers/Kconfig index c82a94b..118b66e 100644 --- a/drivers/Kconfig +++ b/drivers/Kconfig @@ -30,6 +30,8 @@ source "drivers/input/Kconfig" source "drivers/led/Kconfig" +source "drivers/memory/Kconfig" + source "drivers/misc/Kconfig" source "drivers/mmc/Kconfig" diff --git a/drivers/memory/Kconfig b/drivers/memory/Kconfig new file mode 100644 index 0000000..4fbb5aa --- /dev/null +++ b/drivers/memory/Kconfig @@ -0,0 +1,18 @@ +# +# Memory devices +# + +menu "Memory Controller drivers" + +config TI_AEMIF + tristate "Texas Instruments AEMIF driver" + depends on ARCH_KEYSTONE + help + This driver is for the AEMIF module available in Texas Instruments + SoCs. AEMIF stands for Asynchronous External Memory Interface and + is intended to provide a glue-less interface to a variety of + asynchronuous memory devices like ASRAM, NOR and NAND memory. A total + of 256M bytes of any of these memories can be accessed at a given + time via four chip selects with 64M byte access per chip select. + +endmenu |