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| author | Stefan Roese <sr@denx.de> | 2016-12-12 08:34:42 +0100 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2017-01-25 07:03:39 +0100 |
| commit | 899fb9e352815ef5a5d9304a097d5abc7c476500 (patch) | |
| tree | 0bee9781e7ef772dea3981781de8de59f2b7d77a /drivers | |
| parent | f2b0c007f84e582b7a101bd49db60cc8d75f5de4 (diff) | |
| download | u-boot-imx-899fb9e352815ef5a5d9304a097d5abc7c476500.zip u-boot-imx-899fb9e352815ef5a5d9304a097d5abc7c476500.tar.gz u-boot-imx-899fb9e352815ef5a5d9304a097d5abc7c476500.tar.bz2 | |
mmc: sdhci: Clear SDHCI_CLOCK_CONTROL before configuring the new value
This patch completely clears the SDHCI_CLOCK_CONTROL register before the
new value is configured instead of just clearing the 2 bits
SDHCI_CLOCK_CARD_EN and SDHCI_CLOCK_INT_EN. Without this change, some
clock configurations will lead to the "Internal clock never stabilised."
error message on the Xenon SDHCI controller used on the Marvell Armada
3700 and 7k/8k ARM64 SoCs.
The Linux SDHCI core driver also writes 0 to this register before
the new value is configured. So this patch simplifies the driver a bit
and brings the U-Boot driver more in-line with the Linux one.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/mmc/sdhci.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c index 84e0581..9902dbd 100644 --- a/drivers/mmc/sdhci.c +++ b/drivers/mmc/sdhci.c @@ -295,7 +295,7 @@ static int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd, static int sdhci_set_clock(struct mmc *mmc, unsigned int clock) { struct sdhci_host *host = mmc->priv; - unsigned int div, clk = 0, timeout, reg; + unsigned int div, clk = 0, timeout; /* Wait max 20 ms */ timeout = 200; @@ -311,9 +311,7 @@ static int sdhci_set_clock(struct mmc *mmc, unsigned int clock) udelay(100); } - reg = sdhci_readw(host, SDHCI_CLOCK_CONTROL); - reg &= ~(SDHCI_CLOCK_CARD_EN | SDHCI_CLOCK_INT_EN); - sdhci_writew(host, reg, SDHCI_CLOCK_CONTROL); + sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); if (clock == 0) return 0; |