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| author | Ye Li <ye.li@nxp.com> | 2016-03-10 15:38:02 +0800 |
|---|---|---|
| committer | Ye Li <ye.li@nxp.com> | 2016-03-25 15:53:19 +0800 |
| commit | fb3437de6049a1170a4c9cf63818a9558ebf5a5b (patch) | |
| tree | b099946445d48d651db2cb5c7f9b8981c98ecaea /drivers | |
| parent | 6723fda2be4bc2cf70aba7773775cd73fea5298c (diff) | |
| download | u-boot-imx-fb3437de6049a1170a4c9cf63818a9558ebf5a5b.zip u-boot-imx-fb3437de6049a1170a4c9cf63818a9558ebf5a5b.tar.gz u-boot-imx-fb3437de6049a1170a4c9cf63818a9558ebf5a5b.tar.bz2 | |
MLK-12530 ehci: Fix OTG ID detection issue on mx7
There are two problems in EHCI driver for mx7, and cause the OTG ID detection
failed to work.
1. The offset for phy_status register in usbnc_regs is not correct.
2. We should clear the USBNC_PHYCFG2_ACAENB bit to enable the OTG ID detection,
not set it. When the bit is set, the ACA Resistance Detection is enabled,
which disables the OTG ID detection, because the internal pull up is off.
Signed-off-by: Ye Li <ye.li@nxp.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/usb/host/ehci-mx6.c | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c index e1c67f7..d491d45 100644 --- a/drivers/usb/host/ehci-mx6.c +++ b/drivers/usb/host/ehci-mx6.c @@ -1,6 +1,6 @@ /* * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de> - * Copyright (C) 2010 Freescale Semiconductor, Inc. + * Copyright (C) 2010-2016 Freescale Semiconductor, Inc. * * SPDX-License-Identifier: GPL-2.0+ */ @@ -194,8 +194,9 @@ struct usbnc_regs { u32 reserve1[10]; u32 phy_cfg1; u32 phy_cfg2; + u32 reserve2[1]; u32 phy_status; - u32 reserve2[4]; + u32 reserve3[4]; u32 adp_cfg1; u32 adp_cfg2; u32 adp_status; @@ -207,8 +208,8 @@ static void usb_power_config(int index) (0x10000 * index) + USBNC_OFFSET); void __iomem *phy_cfg2 = (void __iomem *)(&usbnc->phy_cfg2); - /* Enable usb_otg_id detection */ - setbits_le32(phy_cfg2, USBNC_PHYCFG2_ACAENB); + /* Clear the ACAENB to enable usb_otg_id detection, otherwise it is the ACA detection enabled */ + clrbits_le32(phy_cfg2, USBNC_PHYCFG2_ACAENB); } int usb_phy_mode(int port) |