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author | Jaehoon Chung <jh80.chung@samsung.com> | 2012-08-30 16:24:11 +0000 |
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committer | Andy Fleming <afleming@freescale.com> | 2012-09-05 17:33:26 -0500 |
commit | b09ed6e4fe6065851751e7fc381ff40c23fb09f1 (patch) | |
tree | 43abeec28f5647d12e612f9c216309ee028dbda6 /drivers | |
parent | 8458e0283f041a39c80cae9e2ba67ed3c8ebd73c (diff) | |
download | u-boot-imx-b09ed6e4fe6065851751e7fc381ff40c23fb09f1.zip u-boot-imx-b09ed6e4fe6065851751e7fc381ff40c23fb09f1.tar.gz u-boot-imx-b09ed6e4fe6065851751e7fc381ff40c23fb09f1.tar.bz2 |
mmc: s5p_sdhci: add the set_mmc_clk for cmu control
Samsung SoC use the cmu control to set clock.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/mmc/s5p_sdhci.c | 3 | ||||
-rw-r--r-- | drivers/mmc/sdhci.c | 3 |
2 files changed, 6 insertions, 0 deletions
diff --git a/drivers/mmc/s5p_sdhci.c b/drivers/mmc/s5p_sdhci.c index 9378e36..b978236 100644 --- a/drivers/mmc/s5p_sdhci.c +++ b/drivers/mmc/s5p_sdhci.c @@ -21,6 +21,7 @@ #include <malloc.h> #include <sdhci.h> #include <asm/arch/mmc.h> +#include <asm/arch/clk.h> static char *S5P_NAME = "SAMSUNG SDHCI"; static void s5p_sdhci_set_control_reg(struct sdhci_host *host) @@ -87,6 +88,8 @@ int s5p_sdhci_init(u32 regbase, int index, int bus_width) host->version = sdhci_readw(host, SDHCI_HOST_VERSION); host->set_control_reg = &s5p_sdhci_set_control_reg; + host->set_clock = set_mmc_clk; + host->index = index; host->host_caps = MMC_MODE_HC; diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c index 3bb0ad0..2e3c408 100644 --- a/drivers/mmc/sdhci.c +++ b/drivers/mmc/sdhci.c @@ -279,6 +279,9 @@ static int sdhci_set_clock(struct mmc *mmc, unsigned int clock) } div >>= 1; + if (host->set_clock) + host->set_clock(host->index, div); + clk = (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT; clk |= ((div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN) << SDHCI_DIVIDER_HI_SHIFT; |