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authorWu, Josh <Josh.wu@atmel.com>2012-09-13 22:22:04 +0000
committerAndreas Bießmann <andreas.devel@googlemail.com>2012-10-17 11:28:54 +0200
commit1db7377a70a8d931c32648e717695133120d5456 (patch)
treed461e7e61b82bbe6af64e94d63a2465993d091c7 /drivers
parentb9f4bc34ac0ee40f8d6a952036b4cd62b854aa74 (diff)
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mmc: at91: add multi block read/write support.
Since the at91sam9263, the mmc hardware support multi blocks read/write. So this driver enable it. Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/mmc/gen_atmel_mci.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/mmc/gen_atmel_mci.c b/drivers/mmc/gen_atmel_mci.c
index 4968c5e..9f06304 100644
--- a/drivers/mmc/gen_atmel_mci.c
+++ b/drivers/mmc/gen_atmel_mci.c
@@ -87,6 +87,11 @@ static void mci_set_mode(struct mmc *mmc, u32 hz, u32 blklen)
| MMCI_BF(BLKLEN, blklen)
| MMCI_BIT(RDPROOF)
| MMCI_BIT(WRPROOF)), &mci->mr);
+ /*
+ * On some new platforms BLKLEN in mci->mr is ignored.
+ * Should use the BLKLEN in the block register.
+ */
+ writel(MMCI_BF(BLKLEN, blklen), &mci->blkr);
initialized = 1;
}
@@ -183,6 +188,12 @@ mci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
/* Figure out the transfer arguments */
cmdr = mci_encode_cmd(cmd, data, &error_flags);
+ /* For multi blocks read/write, set the block register */
+ if ((cmd->cmdidx == MMC_CMD_READ_MULTIPLE_BLOCK)
+ || (cmd->cmdidx == MMC_CMD_WRITE_MULTIPLE_BLOCK))
+ writel(data->blocks | MMCI_BF(BLKLEN, mmc->read_bl_len),
+ &mci->blkr);
+
/* Send the command */
writel(cmd->cmdarg, &mci->argr);
writel(cmdr, &mci->cmdr);