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authorStefan Agner <stefan@agner.ch>2016-05-05 13:42:45 -0700
committerFrank Li <Frank.Li@nxp.com>2016-05-24 11:09:11 -0500
commitc5c685a789f39868baae7c35646044336a31e9d5 (patch)
tree63ec7d9439df030210d3d0d4f6754ed30a5b17d2 /drivers
parent1820cf22ce9a7e4ba075cf7a9a9f95a4859e34f1 (diff)
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imx: imx7d: fix ahb clock mux 1
The clock parent of the AHB root clock when using mux option 1 is the SYS PLL 270MHz clock. This is specified in Table 5-11 Clock Root Table of the i.MX 7Dual Applications Processor Reference Manual. While it could be a documentation error, the 270MHz parent is also mentioned in the boot ROM configuration in Table 6-28: The clock is by default at 135MHz due to a POST_PODF value of 1 (=> divider of 2). Signed-off-by: Stefan Agner <stefan@agner.ch> (cherry picked from commit 8183b60202754d9d33ac1a2a68a5cc2cc4640fc6)
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