Merge branch 'master' of git://www.denx.de/git/u-boot-imx

9 files changed, 201 insertions, 5 deletions

diff --git a/drivers/Makefile b/drivers/Makefile
index b23076f..b22b109 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -15,3 +15,4 @@ obj-y += video/
 obj-y += watchdog/
 obj-$(CONFIG_QE) += qe/
 obj-y += memory/
+obj-y += pwm/
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index 6bcd522..19d4914 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -60,6 +60,10 @@
 #define STATUS_QEB_MXIC			(1 << 6)
 #define STATUS_PEC			(1 << 7)
 
+#ifdef CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
+#define STATUS_SRWD			(1 << 7) /* SR write protect */
+#endif
+
 /* Flash timeout values */
 #define SPI_FLASH_PROG_TIMEOUT		(2 * CONFIG_SYS_HZ)
 #define SPI_FLASH_PAGE_ERASE_TIMEOUT	(5 * CONFIG_SYS_HZ)
diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
index 36ae5e0..4d148d1 100644
--- a/drivers/mtd/spi/sf_probe.c
+++ b/drivers/mtd/spi/sf_probe.c
@@ -281,6 +281,34 @@ int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash)
 }
 #endif /* CONFIG_OF_CONTROL */
 
+#ifdef CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
+/* enable the W#/Vpp signal to disable writing to the status register */
+static int spi_enable_wp_pin(struct spi_flash *flash)
+{
+	u8 status;
+	int ret;
+
+	ret = spi_flash_cmd_read_status(flash, &status);
+	if (ret < 0)
+		return ret;
+
+	ret = spi_flash_cmd_write_status(flash, STATUS_SRWD);
+	if (ret < 0)
+		return ret;
+
+	ret = spi_flash_cmd_write_disable(flash);
+	if (ret < 0)
+		return ret;
+
+	return 0;
+}
+#else
+static int spi_enable_wp_pin(struct spi_flash *flash)
+{
+	return 0;
+}
+#endif
+
 static struct spi_flash *spi_flash_probe_slave(struct spi_slave *spi)
 {
 	struct spi_flash *flash = NULL;
@@ -351,6 +379,8 @@ static struct spi_flash *spi_flash_probe_slave(struct spi_slave *spi)
 		puts(" Full access #define CONFIG_SPI_FLASH_BAR\n");
 	}
 #endif
+	if (spi_enable_wp_pin(flash))
+		puts("Enable WP pin failed\n");
 
 	/* Release spi bus */
 	spi_release_bus(spi);
diff --git a/drivers/pci/pcie_imx.c b/drivers/pci/pcie_imx.c
index c48737e..a3982c4 100644
--- a/drivers/pci/pcie_imx.c
+++ b/drivers/pci/pcie_imx.c
@@ -509,10 +509,6 @@ static int imx6_pcie_deassert_core_reset(void)
 
 	imx6_pcie_toggle_power();
 
-	/* Enable PCIe */
-	clrbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_TEST_POWERDOWN);
-	setbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_REF_SSP_EN);
-
 	enable_pcie_clock();
 
 	/*
@@ -521,6 +517,10 @@ static int imx6_pcie_deassert_core_reset(void)
 	 */
 	mdelay(50);
 
+	/* Enable PCIe */
+	clrbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_TEST_POWERDOWN);
+	setbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_REF_SSP_EN);
+
 	imx6_pcie_toggle_reset();
 
 	return 0;
diff --git a/drivers/power/pmic/pmic_pfuze100.c b/drivers/power/pmic/pmic_pfuze100.c
index 21f12d2..22a04c0 100644
--- a/drivers/power/pmic/pmic_pfuze100.c
+++ b/drivers/power/pmic/pmic_pfuze100.c
@@ -13,7 +13,7 @@
 
 int power_pfuze100_init(unsigned char bus)
 {
-	static const char name[] = "PFUZE100_PMIC";
+	static const char name[] = "PFUZE100";
 	struct pmic *p = pmic_alloc();
 
 	if (!p) {
diff --git a/drivers/pwm/Makefile b/drivers/pwm/Makefile
new file mode 100644
index 0000000..c0c4883
--- /dev/null
+++ b/drivers/pwm/Makefile
@@ -0,0 +1,13 @@
+#
+# (C) Copyright 2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# (C) Copyright 2001
+# Erik Theisen, Wave 7 Optics, etheisen@mindspring.com.
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+#ccflags-y += -DDEBUG
+
+obj-$(CONFIG_PWM_IMX) += pwm-imx.o pwm-imx-util.o
diff --git a/drivers/pwm/pwm-imx-util.c b/drivers/pwm/pwm-imx-util.c
new file mode 100644
index 0000000..f1d0b35
--- /dev/null
+++ b/drivers/pwm/pwm-imx-util.c
@@ -0,0 +1,73 @@
+/*
+ * (C) Copyright 2014
+ * Heiko Schocher, DENX Software Engineering, hs@denx.de.
+ *
+ * Basic support for the pwm modul on imx6.
+ *
+ * Based on linux:drivers/pwm/pwm-imx.c
+ * from
+ * Sascha Hauer <s.hauer@pengutronix.de>
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+#include <common.h>
+#include <div64.h>
+#include <asm/arch/imx-regs.h>
+
+/* pwm_id from 0..3 */
+struct pwm_regs *pwm_id_to_reg(int pwm_id)
+{
+	switch (pwm_id) {
+	case 0:
+		return (struct pwm_regs *)PWM1_BASE_ADDR;
+		break;
+	case 1:
+		return (struct pwm_regs *)PWM2_BASE_ADDR;
+		break;
+	case 2:
+		return (struct pwm_regs *)PWM3_BASE_ADDR;
+		break;
+	case 3:
+		return (struct pwm_regs *)PWM4_BASE_ADDR;
+		break;
+	default:
+		printf("unknown pwm_id: %d\n", pwm_id);
+		break;
+	}
+	return NULL;
+}
+
+int pwm_imx_get_parms(int period_ns, int duty_ns, unsigned long *period_c,
+		      unsigned long *duty_c, unsigned long *prescale)
+{
+	unsigned long long c;
+
+	/*
+	 * we have not yet a clock framework for imx6, so add the clock
+	 * value here as a define. Replace it when we have the clock
+	 * framework.
+	 */
+	c = CONFIG_IMX6_PWM_PER_CLK;
+	c = c * period_ns;
+	do_div(c, 1000000000);
+	*period_c = c;
+
+	*prescale = *period_c / 0x10000 + 1;
+
+	*period_c /= *prescale;
+	c = (unsigned long long)(*period_c * duty_ns);
+	do_div(c, period_ns);
+	*duty_c = c;
+
+	/*
+	 * according to imx pwm RM, the real period value should be
+	 * PERIOD value in PWMPR plus 2.
+	 */
+	if (*period_c > 2)
+		*period_c -= 2;
+	else
+		*period_c = 0;
+
+	return 0;
+}
diff --git a/drivers/pwm/pwm-imx-util.h b/drivers/pwm/pwm-imx-util.h
new file mode 100644
index 0000000..45465c4
--- /dev/null
+++ b/drivers/pwm/pwm-imx-util.h
@@ -0,0 +1,16 @@
+/*
+ * (C) Copyright 2014
+ * Heiko Schocher, DENX Software Engineering, hs@denx.de.
+ *
+ * Basic support for the pwm modul on imx6.
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+#ifndef _pwm_imx_util_h_
+#define _pwm_imx_util_h_
+
+struct pwm_regs *pwm_id_to_reg(int pwm_id);
+int pwm_imx_get_parms(int period_ns, int duty_ns, unsigned long *period_c,
+		      unsigned long *duty_c, unsigned long *prescale);
+#endif
diff --git a/drivers/pwm/pwm-imx.c b/drivers/pwm/pwm-imx.c
new file mode 100644
index 0000000..40bf027
--- /dev/null
+++ b/drivers/pwm/pwm-imx.c
@@ -0,0 +1,59 @@
+/*
+ * (C) Copyright 2014
+ * Heiko Schocher, DENX Software Engineering, hs@denx.de.
+ *
+ * Basic support for the pwm modul on imx6.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <div64.h>
+#include <pwm.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/io.h>
+#include "pwm-imx-util.h"
+
+int pwm_init(int pwm_id, int div, int invert)
+{
+	struct pwm_regs *pwm = (struct pwm_regs *)pwm_id_to_reg(pwm_id);
+
+	writel(0, &pwm->ir);
+	return 0;
+}
+
+int pwm_config(int pwm_id, int duty_ns, int period_ns)
+{
+	struct pwm_regs *pwm = (struct pwm_regs *)pwm_id_to_reg(pwm_id);
+	unsigned long period_cycles, duty_cycles, prescale;
+	u32 cr;
+
+	pwm_imx_get_parms(period_ns, duty_ns, &period_cycles, &duty_cycles,
+			  &prescale);
+
+	cr = PWMCR_PRESCALER(prescale) |
+		PWMCR_DOZEEN | PWMCR_WAITEN |
+		PWMCR_DBGEN | PWMCR_CLKSRC_IPG_HIGH;
+
+	writel(cr, &pwm->cr);
+	/* set duty cycles */
+	writel(duty_cycles, &pwm->sar);
+	/* set period cycles */
+	writel(period_cycles, &pwm->pr);
+	return 0;
+}
+
+int pwm_enable(int pwm_id)
+{
+	struct pwm_regs *pwm = (struct pwm_regs *)pwm_id_to_reg(pwm_id);
+
+	setbits_le32(&pwm->cr, PWMCR_EN);
+	return 0;
+}
+
+void pwm_disable(int pwm_id)
+{
+	struct pwm_regs *pwm = (struct pwm_regs *)pwm_id_to_reg(pwm_id);
+
+	clrbits_le32(&pwm->cr, PWMCR_EN);
+}